参数资料
| 型号： | FPF1206UCX |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 9/11页 |
| 文件大小： | 0K |
| 描述： | IC LOAD SWITCH ADV 4-WLCSP |
| 标准包装： | 3,000 |
| 系列： | IntelliMax™ |
| 类型： | 通用 |
| 输出数： | 1 |
| Rds（开）： | 300 毫欧 |
| 内部开关： | 是 |
| 输入电压： | 1.2 V ~ 4 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 4-UFBGA，WLCSP |
| 供应商设备封装： | 4-WLCSP |
| 包装： | 带卷 (TR) |
Operation and Application Description
The FPF1205 and FPF1206 are low-R ON P-channel load
switches with controlled turn-on. The core of each
device is a 50 m ? P-channel MOSFET and controller
capable of functioning over a wide input operating range
of 1.2 - 4.0 V. The ON pin, an active HIGH GIOP /
CMOS-compatible input, controls the state of the switch.
The FPF1206 contains a 65 ? on-chip load resistor for
quick output discharge when the switch is turned off.
Input Capacitor
To limit the voltage drop on the input supply caused by
transient inrush current when the switch turns on into a
discharged load capacitor or short-circuit, a capacitor
must be placed between the V IN and GND pins. A 1 μF
ceramic capacitor, C IN , placed close to the pins is
usually sufficient. Higher-value C IN can be used to
reduce the voltage drop in higher-current applications.
Output Capacitor
board inductance from forcing V OUT below GND when
the switch is on. C IN greater than C OUT is highly
recommended. C OUT greater than C IN can cause V OUT to
exceed V IN when the system supply is removed. This
could result in current flow through the body diode from
V OUT to V IN .
Board Layout
For best performance, all traces should be as short as
possible. To be most effective, the input and output
capacitors should be placed close to the device to
minimize the effect that parasitic trace inductance may
have on normal and short-circuit operation. Using wide
traces or large copper planes for all pins (V IN , V OUT , ON,
and GND) helps minimize the parasitic electrical effects
along with minimizing the case ambient thermal
impedance. However, the V OUT pin of FPF1206 should
not connect directly the battery source due to the
discharge mechanism of the load switch.
A 0.1 μF capacitor, C OUT , should be placed between the
V OUT and GND pins. This capacitor prevents parasitic
Figure 25. Typical Application
? 2010 Fairchild Semiconductor Corporation
FPF1205 / FPF1206 ? Rev. 1.0.1
9
www.fairchildsemi.com
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