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参数资料
| 型号： | FSA9288AUMX |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 27/30页 |
| 文件大小： | 0K |
| 描述： | IC USB MULTIMEDIA SWITCH 20-UMLP |
| 标准包装： | 5,000 |
| 功能： | USB 开关 |
| 电路： | 3:1 |
| 电压电源： | 单电源 |
| 电压 - 电源，单路/双路(±)： | 3 V ~ 4.4 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-UFQFN 裸露焊盘 |
| 供应商设备封装： | 20-UMLP（4x3） |
| 包装： | 带卷 (TR) |
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2009 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSA9280A Rev 1.1.0
6
FS
A9
2
80A
—
US
B
Po
rt
Mu
lt
im
edia
Swi
tc
h
,
Fea
turi
n
g
Automatic
Se
lect
a
nd
Ac
ces
s
ory
Detection
2. Power-up & Reset
The FSA9280A does not need special power sequencing for
correct operation. The main power of the device is provided
by either VBUS_IN or VBAT. If VBUS_IN is not present and VBAT is
applied, VBAT is used to power the device. VDDIO is only used
for I
2C interface and interrupt processing.
Table 1 summarizes the enabled features of each power
state of the FSA9280A. The valid voltages levels for each
power supply can be found in Section 9.2.
Table 1
– Power States Summary
Notes:
1.
VDDIO is expected to be the same supply used by the baseband I/Os.
2.
This is not a typical state: both VBAT and VDDIO are typically provided simultaneously.
2.1. Reset
When the device is reset, all the registers are initialized to
the default values shown in Table 7 and all switch paths are
open. After reset or power up, the FSA9280A enters
Standby Mode and is ready to detect accessories sensed on
its VBUS_IN and / or ID_CON pins.
2.1.1.
Hardware Reset
There are three hardware reset mechanisms:
Power-on reset caused by the initial rising edge of V
BUS
or VBAT
The falling edge of V
DDIO.
With V
DDIO valid, driving both I2C_SDA and I2C_SCL
signals LOW for at least 30ms.
Note:
3.
I
2C controllers that implement clock stretching could
cause reset. In this case, GPIOs could be used for the
I
2C interface.
2.1.2.
Software Reset
The device can be reset through software by writing to the
Reset bit in the Register (1BH).
Valid
VBUS_IN
Valid
VBAT
Valid
VDDIO
(1)
Power
State
Enabled Functionality
Charging
through FET
Processor Communication
(I
2C & Interrupts)
Detection
NO
Power Down
NO
YES
(2)
ILLEGAL STATE
NO
YES
NO
Powered from VBAT
NO
YES
NO
YES
Powered from VBAT
NO
YES
NO
Powered from VBUS_IN
Yes
NO
YES
NO
Powered from VBAT
YES
NO
YES
NO
YES
(2)
Powered from VBUS_IN
YES
Powered from VBAT
YES
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