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参数资料
| 型号： | FSEZ1307MY |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 11/16页 |
| 文件大小： | 0K |
| 描述： | IC PWM CTLR PRIMARY REG 7-SOIC |
| 标准包装： | 2,500 |
| 输出隔离： | 隔离 |
| 频率范围： | 47kHz ~ 53kHz |
| 输入电压： | 5.5 V ~ 30 V |
| 输出电压： | 700V |
| 功率（瓦特）： | 660mW |
| 工作温度： | -40°C ~ 105°C |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽）7 引线 |
| 供应商设备封装： | 7-SOP |
| 包装： | 带卷 (TR) |
Cable Voltage Drop Compensation
In cellular phone charger applications, the battery is
located at the end of cable, which typically causes
several percentage points of voltage drop on the battery
voltage. FSEZ1307 has a built-in cable voltage drop
compensation that provides a constant output voltage at
the end of the cable over the entire load range in CV
mode. As load increases, the voltage drop across the
cable is compensated by increasing the reference
voltage of the voltage regulation error amplifier.
Operating Current
The FSEZ1307 operating current is as small as 2.5 mA,
which results in higher efficiency and reduces the V DD
hold-up capacitance requirement. Once FSEZ1307
enters “deep” green mode, the operating current is
reduced to 0.95 mA, assisting the power supply in
meeting power conservation requirements.
Green-Mode Operation
53kHz
50kHz
47kHz
Gate drive signal
t s
t s
t s
f s
The FSEZ1307 uses voltage regulation error amplifier
output (V COMV ) as an indicator of the output load and
The switching frequency decreases as the load
t P
Figure 27. Frequency Hopping
t
decreases. In heavy load conditions, the switching
frequency is fixed at 50 kHz. Once V COMV decreases
below 2.5 V, the PWM frequency linearly decreases
from 50 kHz. When FSEZ1307 enters deep green
mode, the PWM frequency is reduced to a minimum
frequency of 370 Hz, gaining power saving to meet
international power conservation requirements.
High-Voltage Startup
applications. The HV pin is connected to the line input or
bulk capacitor through a resistor, R START (100 k Ω
recommended). During startup, the internal startup
circuit is enabled. Meanwhile, line input supplies the
current, I STARTUP , to charge the hold-up capacitor, C DD ,
Switching Frequency
through R START .
When the V DD voltage
reaches
V DD-ON , the internal startup circuit is disabled, blocking
50kHz
48kHz
Deep
Green
Mode
I STARTUP from flowing into the HV pin. Once the IC turns
on, C DD is the only energy source to supply the IC
consumption current before the PWM starts to switch.
Therefore, C DD must be large enough to prevent V DD
from dropping down to V DD-OFF before the power can be
delivered from the auxiliary winding.
I startup
1kHz
370Hz
Green Mode
Normal Mode
C DL
V DL
+
-
R START
Np
V G
V N
V COMV
Figure 26. Switching Frequency in Green Mode
Frequency Hopping
AC line
FSEZ1307
C DD
N A
EMI reduction is accomplished by frequency hopping,
which spreads the energy over a wider frequency range
than the bandwidth measured by the EMI test
equipment. FSEZ1307 has an internal frequency
hopping circuit that changes the switching frequency
R CS
1
2
3
4
CS
VDD
GND
COMR
Drain
HV
VS
8
7
5
R S1
between 47 kHz and 53 kHz over the period shown in
C vs
Figure 28. HV Startup Circuit
R S2
? 2010 Fairchild Semiconductor Corporation
FSEZ1307 ? Rev. 1.0.3
www.fairchildsemi.com
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