参数资料
| 型号： | FSEZ1317WAMY |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 11/16页 |
| 文件大小： | 0K |
| 描述： | IC CTLR PSR/PWM 7-SOIC |
| 标准包装： | 2,500 |
| 输出隔离： | 隔离 |
| 频率范围： | 47kHz ~ 53kHz |
| 输入电压： | 5.5 V ~ 23 V |
| 输出电压： | 700V |
| 工作温度： | -40°C ~ 105°C |
| 封装/外壳： | * |
| 供应商设备封装： | * |
| 包装： | * |
Cable Voltage Drop Compensation
In cellular phone charger applications, the battery is
located at the end of cable, which typically causes
several percentage of voltage drop on the battery
voltage. FSEZ1317WA has a built-in cable voltage drop
compensation that provides a constant output voltage at
the end of the cable over the entire load range in CV
mode. As load increases, the voltage drop across the
cable is compensated by increasing the reference
voltage of the voltage regulation error amplifier.
Operating Current
The FSEZ1317WA operating current is as small as
2.5 mA, which results in higher efficiency and reduces
the V DD hold-up capacitance requirement. Once
FSEZ1317WA enters “deep” green mode, the operating
current is reduced to 0.95 mA, assisting the power
supply in meeting power conservation requirements.
Green-Mode Operation
The FSEZ1317WA uses voltage regulation error
amplifier output (V COMV ) as an indicator of the output
load and modulates the PWM frequency as shown in
Figure 26. The switching frequency decreases as the
load decreases. In heavy load conditions, the switching
frequency is fixed at 50 kHz. Once V COMV decreases
below 2.5 V, the PWM frequency linearly decreases
from 50 kHz. When FSEZ1317WA enters deep green
mode, the PWM frequency is reduced to a minimum
frequency of 370 Hz, thus gaining power saving to meet
international power conservation requirements.
Figure 27. Frequency Hopping
High-Voltage Startup
Figure 28 shows the HV-startup circuit for
FSEZ1317WA applications. The HV pin is connected to
the line input or bulk capacitor through a resistor, R START
(100 k ? recommended). During startup status, the
internal startup circuit is enabled. Meanwhile, line input
supplies the current, I STARTUP , to charge the hold-up
capacitor, C DD , through R START . When the V DD voltage
reaches V DD-ON , the internal startup circuit is disabled,
blocking I STARTUP from flowing into the HV pin. Once the
IC turns on, C DD is the only energy source to supply the
IC consumption current before the PWM starts to
switch. Thus, C DD must be large enough to prevent V DD
from dropping down to V DD-OFF before the power can be
delivered from the auxiliary winding.
Figure 26. Switching Frequency in Green Mode
Frequency Hopping
EMI reduction is accomplished by frequency hopping,
which spreads the energy over a wider frequency range
than the bandwidth measured by the EMI test
equipment. FSEZ1317WA has an internal frequency
1
2
3
4
8
7
5
hopping circuit that changes the switching frequency
between 46 kHz and 54 kHz over the period shown in
Figure 27.
Figure 28. HV Startup Circuit
? 2012 Fairchild Semiconductor Corporation
FSEZ1317WA ? Rev. 1.0.2
11
www.fairchildsemi.com
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