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参数资料
| 型号： | FT24C08A-USG-B |
| 厂商： | Fremont Micro Devices USA |
| 文件页数： | 6/20页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM 8KBIT 1MHZ 8SOP |
| 标准包装： | 100 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 8K (1K x 8) |
| 速度： | 400kHz，1MHz |
| 接口： | I²C，2 线串口 |
| 电源电压： | 1.8 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOP |
| 包装： | 管件 |
| 其它名称： | 1219-1011 |
24C04A, 24C08A, 24C16A
The least significant 4 bits of the word address (column address) increments internally by one after receiving each
data word. The rest of the word address bits (row address) do not change internally, but pointing to a specific
memory row or page to be programmed. The first page write data word can be of any column address. Up to 16
data words can be loaded into a page. If more then 16 data words are loaded, the 17 th data word will be loaded to
the 1st data word column address. The 18 th data word will be loaded to the 2 nd data word column address and so on.
In other word, data word address (column address) will “roll” over the previously loaded data.
(C) ACKNOWLEDGE POLLING
ACKNOWLEDGE polling may be used to poll the programming status during a self-timed internal programming.
By issuing a valid read or write address command, the EEPROM will not acknowledge at the 9 th clock cycle if the
device is still in the self-timed programming mode. However, if the programming completes and the chip has
returned to the STANDBY mode, the device will return a valid ACKNOWLEDGE signal at the 9 th clock cycle.
READ OPERATIONS
The read command is similar to the write command except the 8 th read/write bit in address word is set to “1”. The three
read operation modes are described as follows:
(A) CURRENT ADDRESS READ
The EEPROM internal address word counter maintains the last read or write address plus one if the power supply
to the device has not been cut off. To initiate a current address read operation, the micro-controller issues a
START bit and a valid device address word with the read/write bit (8 th ) set to “1”. The EEPROM will response
with an ACKNOWLEDGE signal on the 9 th serial clock cycle. An 8-bit data word will then be serially clocked out.
The internal address word counter will then automatically increase by one. For current address read the micro-
controller will not issue an ACKNOWLEDGE signal on the 18 th clock cycle. The micro-controller issues a valid
STOP bit after the 18 th clock cycle to terminate the read operation. The device then returns to STANDBY mode.
(B) SEQUENTIAL READ
The sequential read is very similar to current address read. The micro-controller issues a START bit and a valid
device address word with read/write bit (8 th ) set to “1”. The EEPROM will response with an ACKNOWLEDGE
signal on the 9 th serial clock cycle. An 8-bit data word will then be serially clocked out. Meanwhile the internally
address word counter will then automatically increase by one. Unlike current address read, the micro-controller
sends an ACKNOWLEDGE signal on the 18 th clock cycle signaling the EEPROM device that it wants another byte
of data. Upon receiving the ACKNOWLEDGE signal, the EEPROM will serially clocked out an 8-bit data word
based on the incremented internal address counter. If the micro-controller needs another data, it sends out an
ACKNOWLEDGE signal on the 27 th clock cycle. Another 8-bit data word will then be serially clocked out. This
sequential read continues as long as the micro-controller sends an ACKNOWLEDGE signal after receiving a new
data word. When the internal address counter reaches its maximum valid address, it rolls over to the beginning of
the memory array address. Similar to current address read, the micro-controller can terminate the sequential read
by not acknowledging the last data word received, but sending a STOP bit afterwards instead.
(C) RANDOM READ
Random read is a two-steps process. The first step is to initialize the internal address counter with a target read
address using a “dummy write” instruction. The second step is a current address read.
To initialize the internal address counter with a target read address, the micro-controller issues a START bit first,
follows by a valid device address with the read/write bit (8 th ) set to “0”. The EEPROM will then acknowledge.
The micro-controller will then send the address word. Again the EEPROM will acknowledge. Instead of
sending a valid written data to the EEPROM, the micro-controller performs a current address read instruction to
read the data. Note that once a START bit is issued, the EEPROM will reset the internal programming process and
continue to execute the new instruction - which is to read the current address.
DS3001M-page 6
? 2009 Fremont Micro Devices Inc.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| FT24C08A-USG-T | 功能描述:IC EEPROM 8KBIT 1MHZ 8SOP RoHS:是 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:96 系列:- 格式 - 存储器:闪存 存储器类型:FLASH 存储容量:1M (64K x 16) 速度:150ns 接口:并联 电源电压:3 V ~ 3.6 V 工作温度:0°C ~ 70°C 封装/外壳:48-TFSOP（0.724"，18.40mm 宽） 供应商设备封装:48-TSOP 包装:托盘 |
| FT24C08A-USR-B | 功能描述:IC EEPROM 8KBIT 1MHZ 8SOP RoHS:是 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:96 系列:- 格式 - 存储器:闪存 存储器类型:FLASH 存储容量:1M (64K x 16) 速度:150ns 接口:并联 电源电压:3 V ~ 3.6 V 工作温度:0°C ~ 70°C 封装/外壳:48-TFSOP（0.724"，18.40mm 宽） 供应商设备封装:48-TSOP 包装:托盘 |
| FT24C08A-USR-T | 功能描述:IC EEPROM 8KBIT 1MHZ 8SOP RoHS:是 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:96 系列:- 格式 - 存储器:闪存 存储器类型:FLASH 存储容量:1M (64K x 16) 速度:150ns 接口:并联 电源电压:3 V ~ 3.6 V 工作温度:0°C ~ 70°C 封装/外壳:48-TFSOP（0.724"，18.40mm 宽） 供应商设备封装:48-TSOP 包装:托盘 |
| FT24C08A-UTG-B | 功能描述:IC EEPROM 8KBIT 1MHZ 8TSSOP RoHS:是 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:96 系列:- 格式 - 存储器:闪存 存储器类型:FLASH 存储容量:1M (64K x 16) 速度:150ns 接口:并联 电源电压:3 V ~ 3.6 V 工作温度:0°C ~ 70°C 封装/外壳:48-TFSOP（0.724"，18.40mm 宽） 供应商设备封装:48-TSOP 包装:托盘 |
| FT24C08A-UTG-T | 功能描述:IC EEPROM 8KBIT 1MHZ 8TSSOP RoHS:是 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:96 系列:- 格式 - 存储器:闪存 存储器类型:FLASH 存储容量:1M (64K x 16) 速度:150ns 接口:并联 电源电压:3 V ~ 3.6 V 工作温度:0°C ~ 70°C 封装/外壳:48-TFSOP（0.724"，18.40mm 宽） 供应商设备封装:48-TSOP 包装:托盘 |
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