参数资料
型号: FXP1500-32G
厂商: Power-One
文件页数: 6/16页
文件大小: 0K
描述: FRONT END AC/DC 1500W 32V
标准包装: 1
系列: FXP1500
类型: 标准产品
输出数: 2
输出电压: 32V,5V
输入电压: 85 ~ 264 VAC
输出 - 1 @ 电流(最大): 32 VDC @ 46.9A
输出 - 2 @ 电流(最大): 5 VDC @ 1A
功率(瓦特): 1500W
电源类型: 开关(封闭框架)
应用: 商用
安装类型: *
尺寸/尺寸: 12.00" L x 5.00" W x 1.60" H(305.0mm x 127.0mm x 41.0mm)
工作温度: 0°C ~ 70°C
效率: 89.5%
电源(瓦特)- 最大: 1506W
批准: CE,CSA,EN IEC,UL
线路调节: ±0.5%
负载调整: ±1%
FXP1500-32G AC-DC Front-End
& FXR-3-32G Power Shelf Data Sheet
Output Connector Pinning and Signal Specification
Output Connector
Description
Over-temperature /
Fan Fail
AC Fail /
Power down warning
Power Supply Present
DC Fail /
Output voltage fault
Internal ground
(INT GND)
OC
Pin #
U1
U2
U3
U4
U5
Type
OC-output, protected by 16 V Zener diode
and a 10 ? resistor in series
1K ? Resistor connected to logic GND
OC-output, protected by 16 V Zener diode
and a 10 ? resistor in series
Used only for ADDRx and V O1 set. Do not
connect the internal grounds in systems
with several units.
Signal
Reference
LGND
LGND
LGND
Connected to
V O1 - line before
the output filter
Low level
High level
<0.4 V @ 20 mA
Pull up
<0.4 V @ 20 mA
Pull up
Open
Pull up
<0.4V @ 20 mA
Pull up
-
V max
I max
15 V
20 mA
15 V
20 mA
10 V
10 mA
15 V
20 mA
-
ADDR0 I C address bus
2
T1
ADDR1 I C address bus
ADDR2 I C address bus
V O1 set
2
2
T2
T3
T4
High = internal 10 K ? PU to 5V=> Logic 1
Low = connect to INT GND => Logic 0
INT GND
Logic 1
Logic 0
5V
0V
V O1 set
T5
SDA, I C serial data line
SCL, I C serial clock line
I C compatible signal referenced to logic
2
2
Auxiliary power +5 V
Auxiliary power +5 VRTN
S1
S2
S3
S4
2
GND 5 V or 3.3 V logic
V O2 + output, isolated from main output
Aux output return; ground isolated from
main output
LGND
Aux output is
floating
Logic 1
Logic 0
-
5V
0V
-
Internally connected to Aux GND through
10 ? resistor. Wire LGND separately from
minimize noise on signals and I C bus.
Logic ground (LGND)
S5
Aux RTN and main output GND to
2
-
-
-
Leave open if not used.
Output inhibit R1
V sense +
R1
R2
PS active when pulled low
(DC-DC stage off when left open)
Open or connected toV O1 + at the load
Internally connected to V O1 + via 100 ? .
LGND
-
<0.8 V
>2.0 V
-
10 V
3.5 mA
dV<3 V pp
30 mA
V sense -
R3
Open or connected toV O1 - at the load
Internally connected to V O1 - via 100 ? .
-
-
This pin must be interconnected to pin R4
Active Current Share
R4
of all other paralleled PSUs for proper
-
-
2V
operation of active current share function
Synchronized Startup
(for paralleled units)
R5
Open or connected to synch startup circuit
V o1 - at the OC
12V
2mA
V O1 -
V O1 +
P1, P3, P5
P2, P4, P6
Main output - pins
Main output + pins
-
-
-
-
-
-
Input Connector
Description
Protection Earth
Phase
Neutral
OC
Pin #
P1
P2
P3
Type
PE
L
N
BCD.00021 Rev.AA, 31-JAN -11
Page 6 of 16
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