Contents
Paragraph
Number
Title
Page
Number
MOTOROLA
Contents
xi
4.12.2
4.12.3
4.12.3.1
4.12.3.1.1
4.12.3.1.2
4.12.3.1.3
4.12.3.1.4
4.12.3.1.5
4.12.3.1.6
4.12.3.1.7
4.12.3.1.8
4.12.3.2
4.12.3.2.1
4.12.3.2.2
4.12.3.2.3
4.12.3.2.4
4.12.3.2.5
4.12.3.2.6
4.12.3.2.7
Cache Locking Register Summary................................................................4-32
Performing Cache Locking............................................................................4-33
Data Cache Locking ..................................................................................4-34
Enabling the Data Cache .......................................................................4-34
Address Translation for Data Cache Locking .......................................4-34
Disabling Exceptions for Data Cache Locking .....................................4-35
Invalidating the Data Cache ..................................................................4-36
Loading the Data Cache ........................................................................4-37
Entire Data Cache Locking....................................................................4-37
Data Cache Way-Locking......................................................................4-37
Invalidating the Data Cache (Even if Locked)......................................4-38
Instruction Cache Locking.........................................................................4-38
Enabling the Instruction Cache..............................................................4-38
Address Translation for Instruction Cache Locking..............................4-39
Disabling Exceptions for Instruction Cache Locking............................4-40
Preloading Instructions into the Instruction Cache................................4-40
Entire Instruction Cache Locking..........................................................4-42
Instruction Cache Way-Locking............................................................4-42
Invalidating the Instruction Cache (Even if Locked) ............................4-43
Chapter 5
Exceptions
5.1
5.1.1
5.1.2
5.2
5.2.1
5.2.1.1
5.2.1.2
5.2.1.3
5.2.1.4
5.2.2
5.2.3
5.2.4
5.2.5
5.2.6
5.3
5.4
5.5
5.5.1
5.5.1.1
Exception Classes................................................................................................5-2
Exception Priorities..........................................................................................5-6
Summary of Front-End Exception Handling...................................................5-8
Exception Processing...........................................................................................5-9
Exception Processing Registers.......................................................................5-9
SRR0 and SRR1 Bit Settings.......................................................................5-9
CSRR0 and CSRR1 Bit Settings—G2_LE Only....................................... 5-11
SPRG4–SPRG7 (G2_LE Only)................................................................. 5-11
MSR Bit Settings.......................................................................................5-12
Enabling and Disabling Exceptions...............................................................5-14
Steps for Exception Processing......................................................................5-15
Setting MSR[RI]............................................................................................5-16
Returning From an Exception Handler with
rfi
.............................................5-16
Returning From an Interrupt with
rfci
...........................................................5-16
Process Switching..............................................................................................5-17
Exception Latencies...........................................................................................5-17
Exception Definitions........................................................................................5-18
Reset Exceptions (0x00100)..........................................................................5-19
Hard Reset and Power-On Reset ...............................................................5-19
F
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