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参数资料
| 型号： | H3101B |
| 厂商： | Intersil Corporation |
| 英文描述： | Gilbert Cell UHF Transistor Array |
| 中文描述： | 吉尔伯特细胞超高频晶体管阵列 |
| 文件页数： | 2/12页 |
| 文件大小： | 905K |
| 代理商： | H3101B |
2
Absolute Maximum Ratings
Thermal Information
V
CEO
, Collector to Emitter Voltage . . . . . . . . . . . . . . . . . . . . . . 8.0V
V
CBO
, Collector to Base Voltage . . . . . . . . . . . . . . . . . . . . . . . 12.0V
V
EBO
, Emitter to Base Voltage . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V
I
C
, Collector Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30mA
Operating Conditions
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . -40
o
C to 85
o
C
Thermal Resistance (Typical, Note 1)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Junction Temperature (Die). . . . . . . . . . . . . . . . . . .175
o
C
Maximum Junction Temperature (Plastic Package). . . . . . . . .150
o
C
Maximum Storage Temperature Range. . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300
o
C
(SOIC - Lead Tips Only)
θ
JA
(
o
C/W)
185
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
T
A
= 25
o
C
PARAMETER
TEST CONDITIONS
(NOTE 2)
TEST
LEVEL
MIN
TYP
MAX
UNITS
Collector to Base Breakdown Voltage, V
(BR)CBO
, Q
1
thru Q
6
I
C
= 100
μ
A, I
E
= 0
Collector to Emitter Breakdown Voltage, V
(BR)CEO
,
Q
5
and Q
6
A
12
18
-
V
I
C
= 100
μ
A, I
B
= 0
A
8
12
-
V
Emitter to Base Breakdown Voltage, V
(BR)EBO
, Q
1
thru Q
6
I
E
= 10
μ
A, I
C
= 0
A
5.5
6
-
V
Collector Cutoff Current, I
CBO
, Q
1
thru Q
4
V
CB
= 8V, I
E
= 0
A
-
0.1
10
nA
Emitter Cutoff Current, I
EBO
, Q
5
and Q
6
V
EB
= 1V, I
C
= 0
A
-
-
200
nA
DC Current Gain, h
FE
, Q
1
thru Q
6
I
C
= 10mA, V
CE
= 3V
A
40
70
-
Collector to Base Capacitance, C
CB
Q
1
thru Q
4
V
CB
= 5V, f = 1MHz
C
-
0.300
-
pF
Q
5
and Q
6
-
0.600
-
pF
Emitter to Base Capacitance, C
EB
Q
1
thru Q
4
V
EB
= 0, f = 1MHz
B
-
0.200
-
pF
Q
5
and Q
6
-
0.400
-
pF
Current Gain-Bandwidth Product, f
T
Q
1
thru Q
4
I
C
= 10mA, V
CE
= 5V
C
-
10
-
GHz
Q
5
and Q
6
I
C
= 20mA, V
CE
= 5V
C
-
10
-
GHz
Power Gain-Bandwidth Product, f
MAX
Q
1
thru Q
4
I
C
= 10mA, V
CE
= 5V
C
-
5
-
GHz
Q
5
and Q
6
I
C
= 20mA, V
CE
= 5V
C
-
5
-
GHz
Available Gain at Minimum Noise Figure, G
NFMIN
,
Q
5
and Q
6
I
C
= 5mA,
V
CE
= 3V
f = 0.5GHz
C
-
17.5
-
dB
f = 1.0GHz
C
-
11.9
-
dB
Minimum Noise Figure, NF
MIN
, Q
5
and Q
6
I
C
= 5mA,
V
CE
= 3V
f = 0.5GHz
C
-
1.7
-
dB
f = 1.0GHz
C
-
2.0
-
dB
50
Noise Figure, NF
50
, Q
5
and Q
6
I
C
= 5mA,
V
CE
= 3V
f = 0.5GHz
C
-
2.25
-
dB
f = 1.0GHz
C
-
2.5
-
dB
DC Current Gain Matching, h
FE1
/h
FE2
, Q
1
and Q
2
,
Q
3
and Q
4
, and Q
5
and Q
6
Input Offset Voltage, V
OS
, (Q
1
and Q
2
), (Q
3
and Q
4
),
(Q
5
and Q
6
)
Input Offset Current, I
C
, (Q
1
and Q
2
), (Q
3
and Q
4
),
(Q
5
and Q
6
)
I
C
= 10mA, V
CE
= 3V
A
0.9
1.0
1.1
I
C
= 10mA, V
CE
= 3V
A
-
1.5
5
mV
I
C
= 10mA, V
CE
= 3V
A
-
5
25
μ
A
Input Offset Voltage TC, dV
OS
/dT, (Q1 and Q2, Q3 and Q
4
,
Q
5
and Q
6
)
I
C
= 10mA, V
CE
= 3V
C
-
0.5
-
μ
V/
o
C
Collector to Collector Leakage, I
TRENCH-LEAKAGE
V
TEST
= 5V
B
-
0.01
-
nA
NOTE:
2. Test Level: A. Production Tested, B. Typical or Guaranteed Limit Based on Characterization, C. Design Typical for Information Only.
HFA3101
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