参数资料
型号: HFA1115
厂商: Intersil Corporation
英文描述: 225MHz, Low Power, Output Limiting, Closed Loop Buffer Amplifier(225MHz、低功耗、输出限定锁相环缓冲器放大器)
中文描述: 225MHz?1800MHz的,低功耗,输出限制,闭环缓冲放大器(225MHz?1800MHz的,低功耗,输出限定锁相环缓冲器放大器)
文件页数: 5/14页
文件大小: 159K
代理商: HFA1115
5
The HFA1115’s closed loop gain implementation provides
better gain accuracy, lower offset and output impedance,
and better distortion compared with open loop buffers.
Closed Loop Gain Selection
This “buffer” operates in closed loop gains of -1, +1, or +2, and
gain selection is accomplished via connections to the
±
inputs.
Applying the input signal to +IN and floating -IN selects a gain
of +1 (see next section for layout caveats), while grounding -IN
selects a gain of +2. A gain of -1 is obtained by applying the
input signal to -IN with +IN grounded through a 50
resistor.
The table below summarizes these connections:
Unity Gain Considerations
Unity gain selection is accomplished by floating the -Input of
the HFA1115. Anything that tends to short the -Input to GND,
such as stray capacitance at high frequencies, will cause the
amplifier gain to increase toward a gain of +2. The result is
excessive high frequency peaking, and possible instability.
Even the minimal amount of capacitance associated with
attaching the -Input lead to the PCB results in approximately
3dB of gain peaking. At a minimum this requires due care to
ensure the minimum capacitance at the -Input connection.
.
Table 1 lists five alternate methods for configuring the
HFA1115 as a unity gain buffer, and the corresponding
performance. The implementations vary in complexity and
involve performance trade-offs. The easiest approach to
implement is simply shorting the two input pins together, and
applying the input signal to this common node. The amplifier
bandwidth drops from 400MHz to 200MHz, but excellent
gain flatness is the benefit. Another drawback to this
approach is that the amplifier input noise voltage and input
offset voltage terms see a gain of +2, resulting in higher
noise and output offset voltages. Alternately, a 100pF
capacitor between the inputs shorts them only at high
frequencies, which prevents the increased output offset
voltage but delivers less gain flatness.
Another straightforward approach is to add a 620
resistor
in series with the positive input. This resistor and the
HFA1115 input capacitance form a low pass filter which rolls
off the signal bandwidth before gain peaking occurs. This
configuration was employed to obtain the datasheet AC and
transient parameters for a gain of +1.
Non-inverting Input Source Impedance
For best operation, the DC source impedance seen by the
non-inverting input should be
50
.
This is especially
important in inverting gain configurations where the non-
inverting input would normally be connected directly to GND.
Pulse Undershoot and Asymmetrical Slew Rates
The HFA1115 utilizes a quasi-complementary output stage to
achieve high output current while minimizing quiescent supply
current. In this approach, a composite device replaces the
traditional PNP pulldown transistor. The composite device
switches modes after crossing 0V, resulting in added
distortion for signals swinging below ground, and an
increased undershoot on the negative portion of the output
waveform (see Figures 9, 13, and 17). This undershoot isn’t
present for small bipolar signals, or large positive signals.
Another artifact of the composite device is asymmetrical slew
rates for output signals with a negative voltage component.
The slew rate degrades as the output signal crosses through
0V (see Figures 9, 13, and 17), resulting in a slower overall
negative slew rate. Positive only signals have symmetrical
slew rates as illustrated in the large signal positive pulse
response graphs (see Figures 7, 11, and 15).
PC Board Layout
This amplifier’s frequency response depends greatly on the
care taken in designing the PC board.
The use of low
inductance components such as chip resistors and chip
capacitors is strongly recommended, while a solid
ground plane is a must!
Attention should be given to decoupling the power supplies.
A large value (10
μ
F) tantalum in parallel with a small value
(0.1
μ
F) chip capacitor works well in most cases.
Terminated microstrip signal lines are recommended at the input
and output of the device. Capacitance directly on the output
must be minimized, or isolated as discussed in the next section.
For unity gain applications, care must also be taken to
minimize the capacitance to ground at the amplifier’s
inverting input. At higher frequencies this capacitance tends
to short the -INPUT to GND, resulting in a closed loop gain
which increases with frequency. This causes excessive high
frequency peaking and potentially other problems as well.
An example of a good high frequency layout is the
Evaluation Board shown in Figure 2.
GAIN
(A
V
)
-1
CONNECTIONS
+INPUT (PIN 3)
-INPUT (PIN 2)
50
to GND
Input
+1
Input
NC (Floating)
+2
Input
GND
TABLE 1. UNITY GAIN PERFORMANCE FOR VARIOUS
IMPLEMENTATIONS
APPROACH
PEAK-
ING
(dB)
BW
(MHz)
+SR/-SR
(V/
μ
s)
±
0.1dB
GAIN
FLATNESS
(MHz)
Remove Pin 2
2.5
400
1200/850
20
+R
S
= 620
0.6
170
1125/800
25
+R
S
= 620
and
Remove Pin 2
0
165
1050/775
65
Short Pins 2, 3
0
200
875/550
45
100pF cap. be-
tween pins 2, 3
0.2
190
900/550
19
HFA1115
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