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参数资料
| 型号： | HI20201JCP |
| 厂商： | HARRIS SEMICONDUCTOR |
| 元件分类： | DAC |
| 英文描述： | 10-Bit, 160 MSPS, Ultra High Speed D/A Converter |
| 中文描述： | PARALLEL, WORD INPUT LOADING, 0.0052 us SETTLING TIME, 10-BIT DAC, PDIP28 |
| 文件页数： | 3/11页 |
| 文件大小： | 82K |
| 代理商： | HI20201JCP |
10-1199
Absolute Maximum Ratings
Thermal Information
Digital Supply Voltage DV
EE
to DV
SS
. . . . . . . . . . . . . . . . . . . -7.0V
Analog Supply Voltage AV
DD
to AV
SS
. . . . . . . . . . . . . . . . . . -7.0V
Digital Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 to DV
EE
V
Reference Input Voltage. . . . . . . . . . . . . . . . . . . . . . +0.3 to AV
EE
V
Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20mA
Thermal Resistance (Typical, Note 1)
SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150
o
C
Maximum Storage Temperature Range . . . . . . . . . .-65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . . 300
o
C
(SOIC - Lead Tips Only)
θ
JA
(
o
C/W)
67
58
Recommended Operating Conditions
Supply Voltage
AV
EE
, DV
EE
. . . . . . . . . . . . . . . . . . . . . . . . . . . . -4.75V to -5.45V
AV
EE
- DV
EE
. . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.05V to +0.05V
Digital Input Voltage
V
IH
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -1.0V to -0.7V
V
IL
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -1.9V to -1.6V
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Reference Input Voltage, V
REF
. . . . . . . . V
EE
+ 0.5V to V
EE
+ 1.4V
Load Resistance, R
L
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
≥
75
Output Voltage, V
OUT
. . . . . . . . . . . . . . . . . . . . . . . . . . 0.8V to 1.2V
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . .-20
o
C to 75
o
C
NOTE:
1.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
T
A
= 25
o
C, AV
EE
= DV
EE
= -5.2V, AGND = DGND = 0V, R
L
=
∞
, V
OUT
= -1V
PARAMETER
TEST CONDITIONS
HI20201JCB/JCP
UNITS
MIN
TYP
MAX
SYSTEM PERFORMANCE
Resolution
10
-
-
Bits
Integral Linearity Error, INL
f
S
= 160MHz (End Point)
f
S
= 160MHz
(Note 3)
-
-
±
1.0
±
0.50
LSB
Differential Linearity Error, DNL
-
-
LSB
Offset Error, V
OS
(Adjustable to Zero)
Full Scale Error, FSE (Adjustable to Zero)
-
7
-
LSB
(Note 3)
-
-
±
102
LSB
Full Scale Output Current, I
FS
DYNAMIC CHARACTERISTICS
-
-
20
mA
Throughput Rate
See Figure 11
160
-
-
MHz
Glitch Energy, GE
R
OUT
= 75
-
15
-
pV/s
REFERENCE INPUT
Voltage Reference Input Range
With Respect to AV
EE
V
REF
= -4.58V
-3dB point 1V
P-P
Input
+0.5
-
+1.4
V
Reference Input Current
-0.1
-0.4
-3.0
μ
A
Voltage Reference to Output Small
Signal Bandwidth
-
14.0
-
MHz
Output Rise Time, t
r
Output Fall Time, t
f
DIGITAL INPUTS
R
LOAD
= 75
R
LOAD
= 75
-
1.5
-
ns
-
1.5
-
ns
Input Logic High Voltage, V
IH
Input Logic Low Voltage, V
IL
Input Logic Current, I
IL
, I
IH
(For D9 thru D6, COMPL)
(Note 2)
-1.0
-0.89
V
(Note 2)
-1.75
-1.6
V
V
IH
= -0.89V, V
IL
= -1.75V (Note 2)
0.1
1.5
6.0
μ
A
Input Logic Current, I
IL
, I
IH
(For D5 thru D0)
TIMING CHARACTERISTICS
V
IH
= -0.89V, V
IL
= -1.75V (Note 2)
0.1
0.75
3.0
μ
A
Data Setup Time, t
SU
Data Hold Time, t
HLD
Propagation Delay Time, t
PD
Settling Time, t
SET
(to
1
/
2
LSB)
See Figure 11
5
-
-
ns
See Figure 11
1
-
-
ns
See Figure 11
-
3.8
-
ns
See Figure 11
-
5.2
-
ns
HI20201
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