参数资料
| 型号： | HI5731BIPZ |
| 厂商： | Intersil |
| 文件页数： | 17/17页 |
| 文件大小： | 0K |
| 描述： | IC DAC 12BIT 100MSPS HS 28DIP |
| 标准包装： | 78 |
| 设置时间： | 20ns |
| 位数： | 12 |
| 数据接口： | 并联 |
| 转换器数目： | 1 |
| 电压电源： | 模拟和数字，双 ± |
| 功率耗散（最大）： | 650mW |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 通孔 |
| 封装/外壳： | 28-DIP（0.600"，15.24mm） |
| 供应商设备封装： | 28-PDIP |
| 包装： | 管件 |
| 输出数目和类型： | 2 电流，单极 |
| 采样率（每秒）： | 100M |
9
Detailed Description
The HI5731 is a 12-bit, current out D/A converter. The DAC can
convert at 100MSPS and runs on +5V and -5.2V supplies. The
architecture is an R/2R and segmented switching current cell
arrangement to reduce glitch. Laser trimming is employed to
tune linearity to true 12-bit levels. The HI5731 achieves its low
power and high speed performance from an advanced
BiCMOS process. The HI5731 consumes 650mW (typical) and
has an improved hold time of only 0.25ns (typical). The HI5731
is an excellent converter for use in communications applications
and high performance instrumentation systems.
Digital Inputs
The HI5731 is a TTL/CMOS compatible D/A. Data is latched
by a Master register. Once latched, data inputs D0 (LSB)
thru D11 (MSB) are internally translated from TTL to ECL.
The internal latch and switching current source controls are
implemented in ECL technology to maintain high switching
speeds and low noise characteristics.
Decoder/Driver
The architecture employs a split R/2R ladder and
Segmented Current source arrangement. Bits D0 (LSB) thru
D7 directly drive a typical R/2R network to create the binary
weighted current sources. Bits D8 thru D11 (MSB) pass thru
a “thermometer” decoder that converts the incoming data
into 15 individual segmented current source enables. This
split architecture helps to improve glitch, thus resulting in a
more constant glitch characteristic across the entire output
transfer function.
Clocks and Termination
The internal 12-bit register is updated on the rising edge of
the clock. Since the HI5731 clock rate can run to 100MSPS,
to minimize reflections and clock noise into the part proper
termination should be used. In PCB layout clock runs should
be kept short and have a minimum of loads. To guarantee
consistent results from board to board controlled impedance
PCBs should be used with a characteristic line impedance
ZO of 50.
To terminate the clock line, a shunt terminator to ground is
the most effective type at a 100MSPS clock rate. A typical
value for termination can be determined by the equation:
RT = ZO,
for the termination resistor. For a controlled impedance
board with a ZO of 50, the RT = 50. Shunt termination is
best used at the receiving end of the transmission line or as
close to the HI5731 CLK pin as possible.
Rise and Fall times and propagation delay of the line will be
affected by the Shunt Terminator. The terminator should be
connected to DGND.
Noise Reduction
To reduce power supply noise, separate analog and digital
power supplies should be used with 0.1
F and 0.01F
ceramic capacitors placed as close to the body of the
Pin Descriptions
PIN NUMBER
PIN NAME
PIN DESCRIPTION
1-12
D11 (MSB) thru
D0 (LSB)
Digital Data Bit 11, the Most Significant Bit thru Digital Data Bit 0, the Least Significant Bit.
15
CLK
Data Clock Pin DC to 100MSPS.
13, 14
NC
No Connect.
16
DVCC
Digital Logic Supply +5V.
17, 28
DGND
Digital Ground.
18
DVEE
-5.2V Logic supply.
23
RSET
External resistor to set the full scale output current. IFS = 16 x (VREF OUT / RSET). Typically 976.
27
AGND
Analog Ground supply current return pin.
19
ARTN
Analog Signal Return for the R/2R ladder.
21
IOUT
Current Output Pin.
20
IOUT
Complementary Current Output Pin.
22
AVEE
-5.2V Analog Supply.
24
CTRL IN
Input to the current source base rail. Typically connected to CTRL OUT and a 0.1
F capacitor to AVEE. Allows
external control of the current sources.
25
CTRL OUT
Control Amplifier Out. Provides precision control of the current sources when connected to CTRL IN such that
IFS = 16 x (VREF OUT / RSET).
26
REF OUT
-1.23V (Typ) bandgap reference voltage output. Can sink up to 125
A or be overdriven by an external
reference capable of delivering up to 2mA.
FIGURE 21. CLOCK LINE TERMINATION
RT = 50
HI5731
DAC
CLK
ZO = 50
HI5731
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相关代理商/技术参数 |
参数描述 |
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| HI5731D DIE | 制造商:Harris Corporation 功能描述: |
| HI5731-EVP | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Harris Corporation 功能描述: |
| HI5731-EVS | 功能描述:数据转换 IC 开发工具 HI5731 EVAL PL ATFORM FOR RoHS:否 制造商:Texas Instruments 产品:Demonstration Kits 类型:ADC 工具用于评估:ADS130E08 接口类型:SPI 工作电源电压:- 6 V to + 6 V |
| HI5735 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:12-Bit, 80 MSPS, High Speed Video D/A Converter |
| HI5735_04 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:12-Bit, 80 MSPS, High Speed Video D/A Converter |
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