参数资料
型号: HI5812JIJ
厂商: INTERSIL CORP
元件分类: ADC
英文描述: CMOS 20 Microsecond, 12-Bit, Sampling A/D Converter with Internal Track and Hold
中文描述: 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, CDIP24
封装: CERDIP-24
文件页数: 1/13页
文件大小: 427K
代理商: HI5812JIJ
6-1789
Semiconductor
August 1997
HI5812
CMOS 20 Microsecond, 12-Bit, Sampling A/D
Converter with Internal Track and Hold
Features
Conversion Time . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
μ
s
Throughput Rate . . . . . . . . . . . . . . . . . . . . . . . .50 KSPS
Built-In Track and Hold
Guaranteed No Missing Codes Over Temperature
Single Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . .+5V
Maximum Power Consumption. . . . . . . . . . . . . . .25mW
Internal or External Clock
Applications
Remote Low Power Data Acquisition Systems
Digital Audio
DSP Modems
General Purpose DSP Front End
μ
P Controlled Measurement System
Professional Audio Positioner/Fader
Description
The HI5812 is a fast, low power, 12-bit, successive
approximation analog-to-digital converter. It can operate from
a single 3V to 6V supply and typically draws just 1.9mA when
operating at 5V. The HI5812 features a built-in track and hold.
The conversion time is as low as 15
μ
s with a 5V supply.
The twelve data outputs feature full high speed CMOS three-
state bus driver capability, and are latched and held through a
full conversion cycle. The output is user selectable: (i.e.) 12-
bit, 8-bit (MSBs), and/or 4-bit (LSBs). A data ready flag, and
conversion-start inputs complete the digital interface.
An internal clock is provided and is available as an output.
The clock may also be over-driven by an external source.
Pinout
HI5812
(PDIP, CERDIP, SOIC)
TOP VIEW
Ordering Information
PART
NUMBER
INL (LSB)
(MAX OVER
TEMP.)
TEMP.
RANGE
(
o
C)
PACKAGE
PKG.
NO.
HI5812JIP
±
1.5
-40 to 85 24 Ld PDIP
E24.3
HI5812KIP
±
1.0
-40 to 85 24 Ld PDIP
E24.3
HI5812JIB
±
1.5
-40 to 85 24 Ld SOIC
M24.3
HI5812KIB
±
1.0
-40 to 85 24 Ld SOIC
M24.3
HI5812JIJ
±
1.5
-40 to 85 24 Ld CERDIP
F24.3
HI5812KIJ
±
1.0
-40 to 85 24 Ld CERDIP
F24.3
1
2
3
4
5
6
7
8
9
10
11
12
DRDY
(LSB) D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
V
SS
16
17
18
19
20
21
22
23
24
15
14
13
V
DD
OEL
CLK
STRT
V
REF
-
V
REF
+
V
IN
V
AA
+
V
AA
-
OEM
D11 (MSB)
D10
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
Harris Corporation 1997
File Number
3214.4
相关PDF资料
PDF描述
HI5812JIP CMOS 20 Microsecond, 12-Bit, Sampling A/D Converter with Internal Track and Hold
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