参数资料
型号: HI7188EVAL
厂商: Intersil
文件页数: 1/22页
文件大小: 0K
描述: EVALUATION PLATFORM HI7188
产品培训模块: Solutions for Industrial Control Applications
标准包装: 1
ADC 的数量: 1
位数: 16
采样率(每秒): 240
数据接口: 串行
输入范围: ±2.5 V
在以下条件下的电源(标准): 28mW @ 240SPS
工作温度: -40°C ~ 85°C
已用 IC / 零件: HI7188
已供物品:
Using The HI7188 Evaluation Kit
Application Note
June 1996
AN9518.1
Authors: John J. Kornblum and David C. Jarman
Evaluation Kit Description
The HI7188 Evaluation Kit (evaluation board and evaluation
software) can be used to evaluate the performance of the
HI7188 16-bit Sigma Delta Analog-to-Digital Converter (ADC).
The evaluation board includes a reference circuit, a crystal, an
oscillator, and digital circuitry used to interface to a personal
computer running the evaluation software. Also included are
two single ended to differential converter circuits and two
resistor ladder networks which can be used to provide inputs
to the HI7188. In addition, the board provides means for the
user to supply an external reference and an external clock.
HI7188 Description
The HI7188 is a Monolithic 8-Channel Sigma-Delta A/D
Converter which operates from ± 5V supplies and is intended
for use in applications such as industrial weight scales, pro-
cess controls, and process measurement systems. The
block diagram shows that the device consists of an 8-chan-
nel multiplexer, Programmable Gain Instrumentation Ampli-
?er (PGIA), Sigma-Delta modulator, digital ?lter, bidirectional
serial port (compatible with many industry standard proto-
cols), clock oscillator, a controller, and static RAMs used for
calibration coef?cients and conversion scan buffer.
The 8 to 1 multiplexer at the input, combined with the
resetable modulator on the HI7188, allow for conversions of
up to 8 channels of data with each channel being updated at a
rate of 240 samples per second (with 60Hz line noise rejec-
tion enabled). After the signal has passed through the multi-
plexer it moves into the PGIA where it is gained up by a factor
of 1 to 8 and then it passes to the sigma delta modulator. The
data emerges from the modulator as a pulse train whose code
density contains the analog signal information. The output of
the modulator is fed into the digital integrating filter. Data out
of the filter is available after 201 bits are received from the
modulator. If the part is in line noise rejection mode, the inte-
grator filter data is routed to one of eight averaging filters. The
averaged data is then calibrated and stored in the data RAM.
If line noise rejection is disabled, the averaging ?lters are
bypassed, calibration is performed on the data from the inte-
grating ?lter, and the result is stored in the data RAM.
After all active channels are converted, the HI7188 gener-
ates an End-of-Scan interrupt, EOS, that indicates all active
channels have been updated and valid data is available to be
read.
Converted data is read via the HI7188 serial I/O port which
is compatible with most synchronous transfer formats includ-
ing both the Motorola SPI and Intel 8051 series SSR proto-
cols. Data is read from the HI7188 in “burst” mode. That is,
the data for all active channels is read out of the HI7188 in a
single read communication cycle.
Hardware Description
The HI7188 Evaluation Board provides the user with a very
simple way of interfacing to, and evaluating the Intersil
HI7188 16-channel sigma delta ADC. The board features two
reference voltage generators, a crystal oscillator, and digital
line drivers and receivers for interfacing to a PC running the
evaluation software. The board consists of 4 layers with sep-
arate analog and digital ground planes for obtaining optimum
noise performance.
Layout and Power Supplies
The HI7188 Evaluation Board consists of 4 layers laid out to
optimize performance of the ADC. The ?gures at the end of
this document include the various layers of the board and
their layout, a list of the board components, and schematics.
Users should feel free to copy this layout for use in their
applications.
The power supplies are provided to the board via the edge
connector located at the top of the board. It is recommended
that twisted pair wires be used to connect the power supplies
to the connector and that analog and digital grounds be tied
together back at the power supplies. The separate supplies
are necessary to keep the digital noise from coupling into the
analog portions of the circuit. One of the internal layers of the
board is the ground plane layer. This layer is roughly divided in
half, with one half being digital ground and the other half being
analog ground. The other internal layer is the power plane. It
is divided into three sections; AV DD , AV SS , and DV DD . Nomi-
nal values for the supplies are AV DD = +5V, AV SS = -5V, and
DV DD = +5V. In some cases (for instance, if there is a sub-
stantial offset between AGND and DGND) it may be neces-
sary to tie the two grounds together on the board. Resistors
R 2 , R 4 , and R 5 provide a means of connecting the two ground
planes together via a low impedance.
A prototype area is provided on the left side of the board.
This area has a small section of analog ground plane in the
center and may be useful for input signal conditioning in front
of the HI7188.
Reference Circuit
The reference inputs of the HI7188, V RHI and V RLO , provide
a differential reference input capability. The reference inputs
provide a high impedance dynamic load similar to the analog
inputs. For proper circuit operation these pins must be driven
by low impedance circuitry. Reference noise outside of the
band of interest will be removed by the on-chip digital ?lter,
but excessive reference noise inside the band of interest will
degrade performance of the HI7188.
1
1-888-INTERSIL or 321-724-7143 | Copyright
? Intersil Corporation 1999
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