参数资料
型号: HIP1012ACBZA-T
厂商: Intersil
文件页数: 12/15页
文件大小: 0K
描述: IC CTRLRL HOT PLUG DUAL 14-SOIC
标准包装: 2,500
类型: 热交换控制器
应用: 通用
内部开关:
电源电压: 10.5 V ~ 13.2 V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 14-SOIC(0.154",3.90mm 宽)
供应商设备封装: 14-SOICN
包装: 带卷 (TR)
HIP1012A
TABLE 5. HIP1012EVAL1 BOARD COMPONENT LISTING
COMPONENT
DESIGNATOR
GENERIC BOARD
U1
Q1, Q2
QxB and QxC
R 1
R 2
R 3 , R 4
R 5
R*
C 3 , C 4
C 1
C 2
C 5
JP1
JP2
JP3
JP4
LED1
W1
TP1 - TP14
P1 - P2
LOAD BOARD
SW11 and RL1
SW12 and RL2
SW13 and RL3
SW14 and RL4
LED2, LED3
COMPONENT NAME
HIP1012CB or HIP1012ACB
RF1K49156, Si4404DY
NOT POPULATED
5V Sense Resistor
3.3V/12V Sense Resistor
Loop compensation Resistors
Current Limit Set Resistor
Isolation resistor (not provided, see Decoupling
Concerns in Critical Items section)
Gate Timing Capacitors
Charge Pump Capacitor
Time-out Set Capacitor
Vdd decoupling capacitor
Jumper to configure PWRON2
Jumper to configure VDD
Jumper to configure Charge Pump Cap
Jumper to configure PWRON1
Pgood indicator
NOT PROVIDED
Test Points for HIP1012 pin 1 to pin 14
Edge connector fingers
5V high load (7 ? )
5V low load (10 ? )
3.3V high load (0.8 ? )
3.3V low load (1.6 ? )
Load “HOT” indicators
COMPONENT DESCRIPTION
Intersil Corporation, Dual Power Controller
N-Channel MOSFET in 8 SOIC or equivalent replacement
Mounting areas for additional 8 SOIC , DPAK or D 2 PAK packaged
MOSFETs
100m ?, 1 %, Metal Strip current sensing resistor
20m ?, 1 %, Metal Strip current sensing resistor
20 ? , Resistor in series with gate capacitor. This RC may be necessary
to provide current loop stability. Keep resistor < 50 ? .
10k ? , Current limit = ~10 μ A x (R ILIM / R SENSE ).
Add resistor (<50 ? ) to isolate V DD from load transients if necessary to
eliminate random V DD low reset. Cut short to install.
0.01 μ F, 10 μ A charging I source provides slow ramp on of N-Channel
MOSFETs
0.1 μ F, Charge Pump Capacitor necessary for +12V and +5V
operation.
0.047 μ F, Provides ~9ms of time-out period prior to latch off during
which IOC can be resolved. The duration of current limit time-out (in
seconds) = 200k ? x C TIM (Farads).
0.1 μ F, Provides V DD decoupling
See Table 3 for jumper configuration descriptions
Lit indicates a fault condition
Tie point for dedicated +12V HIP1012 supply, use in default
configuration
Modify edge connector finger lengths for power sequencing
Switch and load resistor pair to invoke high current load on 5V
Switch and load resistor pair to invoke low current load on 5V
Switch and load resistor pair to invoke high current load on 3.3V
Switch and load resistor pair to invoke low current load on 3.3V
Lit indicates N-Channel MOSFETs are on and loads are HOT
BUS BOARD
Bus interconnect board
12
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