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参数资料
| 型号： | HIP2100IBT |
| 厂商： | Intersil |
| 文件页数： | 5/12页 |
| 文件大小： | 0K |
| 描述： | IC DRIVER HALF-BRIDGE 8-SOIC |
| 标准包装： | 2,500 |
| 配置： | 半桥 |
| 输入类型： | PWM |
| 延迟时间： | 20ns |
| 电流 - 峰： | 2A |
| 配置数： | 1 |
| 输出数： | 2 |
| 高端电压 - 最大（自引导启动）： | 114V |
| 电源电压： | 9 V ~ 14 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOIC |
| 包装： | 带卷 (TR) |
HIP2100
Electrical Specifications
V DD = V HB = 12V, V SS = V HS = 0V, No Load on LO or HO, Unless Otherwise Specified. (Continued)
T J = +25°C
T J = -40°C TO +125°C
MIN
MAX
PARAMETERS
SYMBOL
TEST CONDITIONS
MIN TYP MAX
(Note 7)
(Note 7)
UNITS
BOOT STRAP DIODE
Low-Current Forward Voltage
V DL
I VDD-HB = 100μA
-
0.45 0.55
-
0.7
V
High-Current Forward Voltage
Dynamic Resistance
V DH
R D
I VDD-HB = 100mA
I VDD-HB = 100mA
-
-
0.7
0.8
0.8
1
-
-
1
1.5
V
Ω
LO GATE DRIVER
Low Level Output Voltage
High Level Output Voltage
Peak Pullup Current
Peak Pulldown Current
V OLL
V OHL
I OHL
I OLL
I LO = 100mA
I LO = -100mA, V OHL = V DD -V LO
V LO = 0V
V LO = 12V
-
-
-
-
0.25
0.25
2
2
0.3
0.3
-
-
-
-
-
-
0.4
0.4
-
-
V
V
A
A
HO GATE DRIVER
Low Level Output Voltage
High Level Output Voltage
Peak Pullup Current
Peak Pulldown Current
V OLH
V OHH
I OHH
I OLH
I HO = 100mA
I HO = -100mA, V OHH = V HB -V HO
V HO = 0V
V HO = 12V
-
-
-
-
0.25
0.25
2
2
0.3
0.3
-
-
-
-
-
-
0.4
0.4
-
-
V
V
A
A
Switching Specifications
V DD = V HB = 12V, V SS = V HS = 0V, No Load on LO or HO, Unless Otherwise Specified.
T J = +25°C
T J = -40°C TO + 125°C
TEST
MIN
MAX
PARAMETERS
SYMBOL
CONDITIONS
MIN TYP MAX
(Note 7)
(Note 7)
UNITS
Lower Turn-Off Propagation Delay (LI Falling to LO Falling)
Upper Turn-Off Propagation Delay (HI Falling to HO Falling)
Lower Turn-On Propagation Delay (LI Rising to LO Rising)
Upper Turn-On Propagation Delay (HI Rising to HO Rising)
Delay Matching: Lower Turn-On and Upper Turn-Off
Delay Matching: Lower Turn-Off and Upper Turn-On
t LPHL
t HPHL
t LPLH
t HPLH
t MON
t MOFF
-
-
-
-
-
-
20
20
20
20
2
2
35
35
35
35
8
8
-
-
-
-
-
-
45
45
45
45
10
10
ns
ns
ns
ns
ns
ns
Either Output Rise/Fall Time
Either Output Rise/Fall Time (3V to 9V)
Either Output Rise Time Driving DMOS
Either Output Fall Time Driving DMOS
Minimum Input Pulse Width that Changes the Output
Bootstrap Diode Turn-On or Turn-Off Time
t RC , t FC
t R , t F
t RD
t FD
t PW
t BS
C L = 1000pF
C L = 0.1μF
C L = IRFR120
C L = IRFR120
-
-
-
-
-
-
10
0.5
20
10
-
10
-
0.6
-
-
-
-
-
-
-
-
-
-
-
0.8
-
-
50
-
ns
μs
ns
ns
ns
ns
NOTE:
7. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
5
FN4022.14
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