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参数资料
| 型号： | HIP2123FRTBZ |
| 厂商： | Intersil |
| 文件页数： | 7/16页 |
| 文件大小： | 0K |
| 描述： | IC INTERFACE |
| 标准包装： | 75 |
| 系列： | * |
HIP2122, HIP2123
Switching Specifications
V DD = V HB = 12V, V SS = V HS = 0V, RDT = 0k Ω , No Load on LO or HO, Unless Otherwise Specified.
T J = +25°C
T J = -40°C to +125°C
PARAMETERS
TEST
MIN
MAX
(see “Timing Diagram”)
HO Turn-Off Propagation Delay
HI Falling to HO Falling
LO Turn-Off Propagation Delay
LO Falling to LO Falling
Minimum Dead-Time Delay (see Note 10)
HO Falling to LO Rising
Minimum Dead-Time Delay (see Note 10)
LO Falling to HO Rising
Maximum Dead-Rising Delay (see Note 10)
HO Falling to LO rising
Maximum Dead-Time Delay (see Note 10)
LO Falling to HO Rising
Either Output Rise/Fall Time
(10% to 90%/90% to 10%)
Either Output Rise/Fall Time
(3V to 9V/9V to 3V)
Bootstrap Diode Turn-On or Turn-Off Time
SYMBOL
t PLHO
t PLLO
t DTHLmin
t DTLHmin
t DTHLmax
t DTLHmax
t RC, t FC
t R, t F
t BS
CONDITIONS
R DT = 80k,
HI 1 to 0, LI 0 to 1
R DT = 80k
Li 1 to 0, HI 0 to 1
R DT = 8k,
HI 1 to 0, LI 0 to 1
R DT = 8k,
Li 1 to 0, HI 0 to 1
C L = 1nF
C L = 0.1mF
MIN
-
-
15
15
150
150
-
-
-
TYPE
32
32
35
25
220
220
10
0.5
10
MAX
50
50
50
50
300
300
-
0.6
-
(Note 9)
-
-
10
10
-
-
-
-
-
(Note 9)
60
60
60
60
-
-
-
0.8
-
UNITS
ns
ns
ns
ns
ns
ns
ns
μs
ns
NOTES:
9. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits are established by
characterization and are not production tested.
10. Dead-Time is defined as the period of time between the LO falling and HO rising or between HO falling and LO rising when the LI and HI inputs
transition simultaneously.
Timing Diagram
LI
LO
90%
HO 10%
t DT
t DT
90%
10%
HI
t R
t PL
t PH
t F
t R AND t F FOR LO ARE NOT
SHOWN FOR CLARITY
EN
7
FN7670.0
December 23, 2011
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