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参数资料
| 型号： | HIP4081AIP |
| 厂商： | Intersil |
| 文件页数： | 5/16页 |
| 文件大小： | 0K |
| 描述： | IC DRIVER FULL-BRIDGE 20-DIP |
| 标准包装： | 18 |
| 配置： | 半桥 |
| 输入类型： | 非反相 |
| 延迟时间： | 60ns |
| 电流 - 峰： | 2.6A |
| 配置数： | 1 |
| 输出数： | 4 |
| 高端电压 - 最大（自引导启动）： | 95V |
| 电源电压： | 9.5 V ~ 15 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 通孔 |
| 封装/外壳： | 20-DIP（0.300"，7.62mm） |
| 供应商设备封装： | 20-PDIP |
| 包装： | 管件 |
| 产品目录页面： | 1239 (CN2011-ZH PDF) |
HIP4081A
Electrical Specifications
V DD = V CC = V AHB = V BHB = 12V, V SS = V ALS = V BLS = V AHS = V BHS = 0V, R HDEL = R LDEL = 100K and
T A = 25°C, Unless Otherwise Specified (Continued)
T JS = -40°C TO
T J = 25°C
125°C
PARAMETER
Peak Pulldown Current
Undervoltage, Rising Threshold
Undervoltage, Falling Threshold
Undervoltage, Hysteresis
SYMBOL
I O -
UV+
UV-
HYS
TEST CONDITIONS
V O UT = 12V
MIN
1.7
8.1
7.6
0.25
TYP
2.4
8.8
8.3
0.4
MAX
3.3
9.4
8.9
0.65
MIN
1.3
8.0
7.5
0.2
MAX
3.6
9.5
9.0
0.7
UNITS
A
V
V
V
Switching Specifications
V DD = V CC = V AHB = V BHB = 12V, V SS = V ALS = V BLS = V AHS = V BHS = 0V, R HDEL = R LDEL = 10K,
C L = 1000pF.
T JS = -40°C
T J = 25°C
TO 125°C
PARAMETER
Lower Turn-off Propagation Delay
SYMBOL
T LPHL
TEST CONDITIONS
MIN
-
TYP
30
MAX
60
MIN
-
MAX
80
UNITS
ns
(ALI-ALO, BLI-BLO)
Upper Turn-off Propagation Delay
T HPHL
-
35
70
-
90
ns
(AHI-AHO, BHI-BHO)
Lower Turn-on Propagation Delay
T LPLH
R HDEL = R LDEL = 10K
-
45
70
-
90
ns
(ALI-ALO, BLI-BLO)
Upper Turn-on Propagation Delay
T HPLH
R HDEL = R LDEL = 10K
-
60
90
-
110
ns
(AHI-AHO, BHI-BHO)
Rise Time
Fall Time
T R
T F
-
-
10
10
25
25
-
-
35
35
ns
ns
Turn-on Input Pulse Width
Turn-off Input Pulse Width
Turn-on Output Pulse Width
Turn-off Output Pulse Width
Disable Turn-off Propagation Delay
T PWIN-ON
T PWIN-OFF
T PWOUT-ON
T PWOUT-OFF
T DISLOW
R HDEL = R LDEL = 10K
R HDEL = R LDEL = 10K
R HDEL = R LDEL = 10K
R HDEL = R LDEL = 10K
50
40
40
30
-
-
-
-
-
45
-
-
-
-
75
50
40
40
30
-
-
-
-
-
95
ns
ns
ns
ns
ns
(DIS - Lower Outputs)
Disable Turn-off Propagation Delay
T DISHIGH
-
55
85
-
105
ns
(DIS - Upper Outputs)
Disable to Lower Turn-on Propagation Delay
T DLPLH
-
40
70
-
90
ns
(DIS - ALO and BLO)
Refresh Pulse Width (ALO and BLO)
Disable to Upper Enable (DIS - AHO and BHO)
T REF-PW
T UEN
240
-
410
450
550
620
200
-
600
690
ns
ns
TRUTH TABLE
INPUT
OUTPUT
ALI, BLI
X
1
0
0
X
AHI, BHI
X
X
1
0
X
U/V
X
0
0
0
1
DIS
1
0
0
0
X
ALO, BLO
0
1
0
0
0
AHO, BHO
0
0
1
0
0
NOTE:
X signifies that input can be either a “1” or “0”.
5
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