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参数资料
| 型号： | HIP4081AIP |
| 厂商： | Intersil |
| 文件页数： | 6/16页 |
| 文件大小： | 0K |
| 描述： | IC DRIVER FULL-BRIDGE 20-DIP |
| 标准包装： | 18 |
| 配置： | 半桥 |
| 输入类型： | 非反相 |
| 延迟时间： | 60ns |
| 电流 - 峰： | 2.6A |
| 配置数： | 1 |
| 输出数： | 4 |
| 高端电压 - 最大（自引导启动）： | 95V |
| 电源电压： | 9.5 V ~ 15 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 通孔 |
| 封装/外壳： | 20-DIP（0.300"，7.62mm） |
| 供应商设备封装： | 20-PDIP |
| 包装： | 管件 |
| 产品目录页面： | 1239 (CN2011-ZH PDF) |
HIP4081A
Pin Descriptions
PIN
NUMBER
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
SYMBOL
BHB
BHI
DIS
V SS
BLI
ALI
AHI
HDEL
LDEL
AHB
AHO
AHS
ALO
ALS
V CC
V DD
BLS
BLO
BHS
BHO
DESCRIPTION
B High-side Bootstrap supply. External bootstrap diode and capacitor are required. Connect cathode of bootstrap
diode and positive side of bootstrap capacitor to this pin. Internal charge pump supplies 30 μ A out of this pin to
maintain bootstrap supply. Internal circuitry clamps the bootstrap supply to approximately 12.8V.
B High-side Input. Logic level input that controls BHO driver (Pin 20). BLI (Pin 5) high level input overrides BHI high
level input to prevent half-bridge shoot-through, see Truth Table. DIS (Pin 3) high level input overrides BHI high level
input. The pin can be driven by signal levels of 0V to 15V (no greater than V DD ).
DISable input. Logic level input that when taken high sets all four outputs low. DIS high overrides all other inputs.
When DIS is taken low the outputs are controlled by the other inputs. The pin can be driven by signal levels of 0V to
15V (no greater than V DD ).
Chip negative supply, generally will be ground.
B Low-side Input. Logic level input that controls BLO driver (Pin 18). If BHI (Pin 2) is driven high or not connected
externally then BLI controls both BLO and BHO drivers, with dead time set by delay currents at HDEL and LDEL (Pin
8 and 9). DIS (Pin 3) high level input overrides BLI high level input. The pin can be driven by signal levels of 0V to 15V
(no greater than V DD ).
A Low-side Input. Logic level input that controls ALO driver (Pin 13). If AHI (Pin 7) is driven high or not connected
externally then ALI controls both ALO and AHO drivers, with dead time set by delay currents at HDEL and LDEL (Pin
8 and 9). DIS (Pin 3) high level input overrides ALI high level input. The pin can be driven by signal levels of 0V to 15V
(no greater than V DD ).
A High-side Input. Logic level input that controls AHO driver (Pin 11). ALI (Pin 6) high level input overrides AHI high
level input to prevent half-bridge shoot-through, see Truth Table. DIS (Pin 3) high level input overrides AHI high level
input. The pin can be driven by signal levels of 0V to 15V (no greater than V DD ).
High-side turn-on DELay. Connect resistor from this pin to V SS to set timing current that defines the turn-on delay of
both high-side drivers. The low-side drivers turn-off with no adjustable delay, so the HDEL resistor guarantees no
shoot-through by delaying the turn-on of the high-side drivers. HDEL reference voltage is approximately 5.1V.
Low-side turn-on DELay. Connect resistor from this pin to V SS to set timing current that defines the turn-on delay of
both low-side drivers. The high-side drivers turn-off with no adjustable delay, so the LDEL resistor guarantees no
shoot-through by delaying the turn-on of the low-side drivers. LDEL reference voltage is approximately 5.1V.
A High-side Bootstrap supply. External bootstrap diode and capacitor are required. Connect cathode of bootstrap
diode and positive side of bootstrap capacitor to this pin. Internal charge pump supplies 30 μ A out of this pin to
maintain bootstrap supply. Internal circuitry clamps the bootstrap supply to approximately 12.8V.
A High-side Output. Connect to gate of A High-side power MOSFET.
A High-side Source connection. Connect to source of A High-side power MOSFET. Connect negative side of
bootstrap capacitor to this pin.
A Low-side Output. Connect to gate of A Low-side power MOSFET.
A Low-side Source connection. Connect to source of A Low-side power MOSFET.
Positive supply to gate drivers. Must be same potential as V DD (Pin 16). Connect to anodes of two bootstrap diodes .
Positive supply to lower gate drivers. Must be same potential as V CC (Pin 15). De-couple this pin to V SS (Pin 4).
B Low-side Source connection. Connect to source of B Low-side power MOSFET.
B Low-side Output. Connect to gate of B Low-side power MOSFET.
B High-side Source connection. Connect to source of B High-side power MOSFET. Connect negative side of
bootstrap capacitor to this pin.
B High-side Output. Connect to gate of B High-side power MOSFET.
6
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相关代理商/技术参数 |
参数描述 |
|---|---|
| HIP4081AIPFSM | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HIP4081AIPZ | 功能描述:功率驱动器IC 80 VDC HI FREQ H-BRDG DRVR W/STA RoHS:否 制造商:Micrel 产品:MOSFET Gate Drivers 类型:Low Cost High or Low Side MOSFET Driver 上升时间: 下降时间: 电源电压-最大:30 V 电源电压-最小:2.75 V 电源电流: 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Tube |
| HIP4081IB | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:80V/2.5A Peak, High Frequency Full Bridge FET Driver |
| HIP4081IB/IP WAF | 制造商:Harris Corporation 功能描述: |
| HIP4081IP | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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