参数资料
型号: HIP4086AP
厂商: Intersil
文件页数: 15/16页
文件大小: 0K
描述: IC DRIVER 3-PHASE FET 24-PDIP
标准包装: 15
配置: 3 相桥
输入类型: 反相和非反相
延迟时间: 65ns
电流 - 峰: 500mA
配置数: 1
输出数: 3
高端电压 - 最大(自引导启动): 95V
电源电压: 7 V ~ 15 V
工作温度: -40°C ~ 125°C
安装类型: 通孔
封装/外壳: 24-DIP(0.300",7.62mm)
供应商设备封装: 24-PDIP
包装: 管件
HIP4086, HIP4086A
Dual-In-Line Plastic Packages (PDIP)
INDEX
AREA
N
1 2 3
N/2
E1
E24.3 (JEDEC MS-001-AF ISSUE D)
24 LEAD NARROW BODY DUAL-IN-LINE PLASTIC
PACKAGE
INCHES MILLIMETERS
-B-
SYMBOL
MIN
MAX
MIN
MAX
NOTES
-A-
D
E
A
-
0.210
-
5.33
4
BASE
PLANE
SEATING
PLANE
-C-
A2
L
A
CL
A1
A2
B
0.015
0.115
0.014
-
0.195
0.022
0.39
2.93
0.356
-
4.95
0.558
4
-
-
D1
B1
B
D1
e
0.010 (0.25) M
A1
e C
C A B S
e A
C
e B
B1
C
D
D1
0.045
0.008
1.230
0.005
0.070
0.014
1.280
-
1.15
0.204
31.24
0.13
1.77
0.355
32.51
-
8
-
5
5
NOTES:
1. Controlling Dimensions: INCH. In case of conflict between English and
E
E1
0.300
0.240
0.325
0.280
7.62
6.10
8.25
7.11
6
5
Metric dimensions, the inch dimensions control.
2. Dimensioning and tolerancing per ANSI Y14.5M - 1982.
3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
e
e A
0.100 BSC
0.300 BSC
2.54 BSC
7.62 BSC
-
6
Publication No. 95.
e B
-
0.430
-
10.92
7
4. Dimensions A, A1 and L are measured with the package seated in
JEDEC seating plane gauge GS - 3.
5. D, D1, and E1 dimensions do not include mold flash or protrusions.
Mold flash or protrusions shall not exceed 0.010 inch (0.25mm).
L
N
0.115
24
0.150
2.93
24
3.81
4
9
Rev. 0 12/93
6. E and e A are measured with the leads constrained to be perpendic-
ular to datum -C- .
7. e B and e C are measured at the lead tips with the leads unconstrained.
e C must be zero or greater.
8. B1 maximum dimensions do not include dambar protrusions. Dambar
protrusions shall not exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3,
E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).
15
FN4220.9
February 1, 2013
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