参数资料
型号: HIP6003
厂商: Intersil Corporation
英文描述: Buck Pulse-Width Modulator (PWM) Controller and Output Voltage Monitor
中文描述: 降压脉宽调制(PWM)控制器和输出电压监视器
文件页数: 5/12页
文件大小: 208K
代理商: HIP6003
5
RT/OVP (Pin 15)
This pin is multiplexed, providing two functions. The first
function is oscillator switching frequency adjustment. By
placing a resistor (R
T
) from this pin to GND, the nominal
200KHz switching frequency is increased according to the
following equation:
Conversely, connecting a pull-up resistor (R
T
) from this pin
to V
CC
reduces the switching frequency according to the
following equation:
The second function for this pin is to drive an external SCR
in the event of an overvoltage condition.
VSEN (Pin 16)
This pin is connected to the converters output voltage. The
PGOOD and OVP comparator circuits use this signal to
report output voltage status and for overvoltage protection.
Functional Description
Initialization
The HIP6003 automatically initializes upon receipt of power.
Special sequencing of the input supplies is not necessary.
The Power-On Reset (POR) function continually monitors
the input supply voltages. The POR monitors the bias
voltage at the VCC pin and the input voltage (V
IN
) on the
OCSET pin. The level on OCSET is equal to V
IN
less a fixed
voltage drop (see over-current protection). The POR function
initiates soft start operation after both input supply voltages
exceed their POR thresholds. For operation with a single
+12V power source, V
IN
and V
CC
are equivalent and the
+12V power source must exceed the rising V
CC
threshold
before POR initiates operation.
Soft Start
The POR function initiates the soft start sequence. An
internal 10
μ
A current source charges an external capacitor
(C
SS
) on the SS pin to 4V. Soft start clamps the error
amplifier output (COMP pin) and reference input (+ terminal
of error amp) to the SS pin voltage. Figure 3 shows the soft
start interval with C
SS
= 0.1
μ
F. Initially the clamp on the error
amplifier (COMP pin) controls the converter’s output voltage.
At t1 in Figure 3, the SS voltage reaches the valley of the
oscillator’s triangle wave. The oscillator’s triangular
waveform is compared to the ramping error amplifier voltage.
This generates PHASE pulses of increasing width that
charge the output capacitor(s). This interval of increasing
pulse width continues to t2. With sufficient output voltage,
the clamp on the reference input controls the output voltage.
This is the interval between t2 and t3 in Figure 3. At t3 the
SS voltage exceeds the DACOUT voltage and the output
voltage is in regulation. This method provides a rapid and
controlled output voltage rise. The PGOOD signal toggles
‘high’ when the output voltage (VSEN pin) is within
±
5% of
DACOUT. The 2% hysteresis built into the power good
comparators prevents PGOOD oscillation due to nominal
output voltage ripple.
Over-Current Protection
The over-current function protects the converter from a
shorted output by using the upper MOSFETs on-resistance,
r
DS(ON)
to monitor the current. This method enhances the
converter’s efficiency and reduces cost by eliminating a
current sensing resistor.
The over-current function cycles the soft-start function in a
hiccup mode to provide fault protection. A resistor (R
OCSET
)
programs the over-current trip level. An internal 200
μ
A current
sink develops a voltage across R
OCSET
that is referenced to
V
IN
. When the voltage across the upper MOSFET (also
referenced to V
IN
) exceeds the voltage across R
OCSET
, the
over-current function initiates a soft-start sequence. The soft-
start function discharges C
SS
with a 10
μ
A current sink and
inhibits PWM operation. The soft-start function recharges
C
SS
, and PWM operation resumes with the error amplifier
clamped to the SS voltage. Should an overload occur while
recharging C
SS
, the soft start function inhibits PWM operation
while fully charging C
SS
to 4V to complete its cycle. Figure 4
shows this operation with an overload condition. Note that the
inductor current increases to over 15A during the C
SS
charging interval and causes an over-current trip. The
F
S
200kHz
+5
6
T
)
--------------------
R
T
to GND
(
)
F
S
200kHz
+4
7
T
)
--------------------
R
T
to 12V
(
)
FIGURE 3. SOFT START INTERVAL
0V
0V
0V
TIME (5ms/DIV)
SOFT-START
(1V/DIV)
OUTPUT
VOLTAGE
(1V/DIV)
t
2
t
3
PGOOD
(2V/DIV)
t
1
HIP6003
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