参数资料
型号: HIP6021EVAL1
厂商: Intersil
文件页数: 5/10页
文件大小: 0K
描述: EVALUATION BOARD HIP6021
标准包装: 1
主要目的: DC/DC,LDO 步降
输出及类型: 4,非隔离
输出电压: 1.3 ~ 3.5V,1.5V,1.8V,1.5V 或 3.3V
电流 - 输出: 10A,1A,1A,1A
输入电压: 3.3V,5V,12V
稳压器拓扑结构: 降压
频率 - 开关: 200kHz
板类型: 完全填充
已供物品:
已用 IC / 零件: HIP6021
Application Note 9836
V VCC – VTT = 1.5V T ? 1 + -------- ?
V VCC – MCH = 1.8V T ? 1 + ----------- ?
should be at least 1.25 to 1.5 times the maximum input
voltage. High frequency decoupling (highly recommended) is
implemented through the use of ceramic capacitors in
parallel with the bulk aluminum capacitor filtering. The
switching converter’s input RMS current is dependent on the
input and output voltages as well as the output current.
Figure 10 shows this approximate relationships for five
different levels of current. Based on the linearity of the
relationship, the graph results can be interpolated for
additional levels of output current. For output voltages
ranging from 2 to 3 volts, a good approximation of the input
RMS current is 1/2 the output current.
out JP5 will allow the internal pullup to hold the SELECT pin
at a TTL high.
The HIP6020 linear controller outputs (VCC_VTT and
VCC_MCH) are set by internal resistor dividers to 1.5V and
1.8V respectively. The output levels can be increased by
adding external resistors to the VSEN lines per the following
equations:
R8
? R9 ?
R10
? R11 ?
10
8
6
4
I OUT = 18A
I OUT = 16A
I OUT = 14A
I OUT = 12A
I OUT = 10A
V IN = 5V
Note that the resistor values used should be no more than
5k Ω in total value. If this is not met, the internal resistor
values will induce some degree of offset in the output
voltages.
The HIP6021 gives the user the option to override the
internal resistors and adjust the output voltage based on the
chip’s internal bandgap voltage reference. By grounding the
FIX pin (pin 2), simple resistor value changes allow for
outputs as low as 1.3V or as high as the input voltage. The
steady-state DC output voltages can be set using the
2
following equations:
V VCC – VTT = V REF T ? 1 + ----------- ?
0
0
1
2 3
OUTPUT VOLTAGE (V)
4
5
R9
? R10 ?
V REF = HIP6021 internal reference voltage (typically 1.267V)
V VCC – CLK = V REF T ? 1 + ----------- ? , where
FIGURE 10. SWITCHING CONVERTER RMS INPUT CURRENT
Using the above graph and the capacitor RMS current
rating, a minimum number of input capacitors can be easily
determined. If the time-averaged load is different than the
maximum load, the number of input capacitors may be
cautiously scaled down.
Output Voltages
The synchronous buck converter supplying the
microprocessor core voltage is controlled by the internal
DAC. Output voltage can be adjusted by selecting the
appropriate VID jumper combination. For more information
please refer to the HIP6020 or HIP6021 data sheet which
contains a very comprehensive table detailing all the VID
combinations and the resultant output voltages. If droop
implementation is desired, the no-load output voltage can be
determined from the following equation:
R11
? R12 ?
Left open, the FIX pin is pulled high internally and the fixed
1.5V and 1.8V outputs are enabled.
Conclusion
The HIP6020/21EVAL1 board lends itself to a wide variety of
high-power DC-DC microprocessor converter designs. The
built-in flexibility allows the designer to quickly modify for
applications with various requirements, the printed circuit
board being laid out to accommodate the necessary
components for operation at currents up to 19A.
References
For Intersil documents available on the web, see
http://www.intersil.com/
V VCC – CORE = V DAC T ? 1 + ---------------------- ?
V VCC – CORE = V DAC T ? 1 + ---------------------- ?
? R7 ?
? R8 ?
R4 + R5
R5 + R6
HIP6020EVAL1
HIP6021EVAL1
[1] HIP6020 Data Sheet , Intersil Corporation, FN4683
[2] HIP6021 Data Sheet , Intersil Corporation, FN4684
[3] Slot 1 Test Kit, Intel # EUCDSLOTKIT1
where V DAC = DAC-set output voltage target.
The AGP bus voltage is controlled by the SELECT pin. A
TTL low inputs sets the internal resistor dividers for 1.5V
output and a TTL high sets the AGP output to 3.3V. Leaving
5
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