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参数资料
| 型号： | HIP6028EVAL1 |
| 厂商： | Intersil Corporation |
| 元件分类： | 基准电压源/电流源 |
| 英文描述： | Advanced PWM and Dual Linear Power Control with Integrated ACPI Support Interface |
| 中文描述： | 先进的双PWM和线性电源控制集成接口ACPI支持 |
| 文件页数： | 12/16页 |
| 文件大小： | 140K |
| 代理商： | HIP6028EVAL1 |
2-322
Compensation Break Frequency Equations
Figure 13 shows an asymptotic plot of the DC-DC
converter’s gain vs. frequency. The actual modulator gain
has a peak due to the high Q factor of the output filter at
F
LC
, which is not shown in Figure 13. Using the above
guidelines should yield a compensation gain similar to the
curve plotted. The open loop error amplifier gain bounds
the compensation gain. Check the compensation gain at
F
P2
with the capabilities of the error amplifier. The closed
loop gain is constructed on the log-log graph of Figure 13
by adding the modulator gain (in dB) to the compensation
gain (in dB). This is equivalent to multiplying the modulator
transfer function to the compensation transfer function and
plotting the gain.
The compensation gain uses external impedance networks
Z
FB
and Z
IN
to provide a stable, high bandwidth loop. A
stable control loop has a 0dB gain crossing with
-20dB/decade slope and a phase margin greater than 45
degrees. Include worst case component variations when
determining phase margin.
Component Selection Guidelines
Output Capacitor Selection
The output capacitors for each output have unique
requirements. In general the output capacitors should be
selected to meet the dynamic regulation requirements.
Additionally, the PWM converters require an output capacitor
to filter the current ripple. The linear regulator is internally
compensated and requires an output capacitor that meets
the stability requirements. The load transient for the
microprocessor core requires high quality capacitors to
supply the high slew rate (di/dt) current demands.
PWM Output Capacitors
Modern microprocessors produce transient load rates above
10A/ns. High frequency capacitors initially supply the transient
and slow the current load rate seen by the bulk capacitors.
The bulk filter capacitor values are generally determined by
the ESR (effective series resistance) and ESL (effective series
inductance) parameters rather than actual capacitance.
High frequency decoupling capacitors should be placed as
close to the power pins of the load as physically possible. Be
careful not to add inductance in the circuit board wiring that
could cancel the usefulness of these low inductance
components. Consult with the manufacturer of the load on
specific decoupling requirements.
Use only specialized low-ESR capacitors intended for
switching regulator applications for the bulk capacitors. The
bulk capacitor’s ESR determines the output ripple voltage
and the initial voltage drop after a high slew-rate transient.
An aluminum electrolytic capacitor’s ESR value is related to
the case size with lower ESR available in larger case sizes.
However, the equivalent series inductance of these
capacitors increases with case size and can reduce the
usefulness of the capacitor to high slew-rate transient
loading. Unfortunately, ESL is not a specified parameter.
Work with your capacitor supplier and measure the
capacitor’s impedance with frequency to select suitable
components. In most cases, multiple electrolytic capacitors
of small case size perform better than a single large case
capacitor. For a given transient load magnitude, the output
voltage transient response due to the output capacitor
characteristics can be approximated by the following
equation:
Linear Output Capacitors
The output capacitors for the linear regulator and the linear
controller provide dynamic load current. The linear controller
uses dominant pole compensation integrated in the error
amplifier and is insensitive to output capacitor selection.
Capacitor, C
OUT3
should be selected for transient load
regulation.
The output capacitor for the linear regulator provides loop
stability. The linear 2.5V regulator requires an output
capacitor characteristic shown in Figure 14 The upper line
plots the 45 phase margin with 150mA load and the lower
line is the 45 phase margin limit with a 10mA load. Select a
C
OUT2
capacitor with characteristic between the two limits.
Output Inductor Selection
The PWM converter requires an output inductor. The output
inductor is selected to meet the output voltage ripple
requirements and sets the converter’s response time to a
load transient. The inductor value determines the converter’s
F
Z1
-----------------------------------
=
F
Z2
R3
)
C3
×
------------------------+
=
F
P1
2
π
R
2
--------+
×
×
------------------------------------------------------
=
F
P2
-----------------------------------
=
100
80
60
40
20
0
-20
-40
-60
F
P1
F
Z2
10M
1M
100K
10K
1K
100
10
OPEN LOOP
ERROR AMP GAIN
F
Z1
F
P2
20LOG
(R
2
/R
1
)
F
LC
F
ESR
COMPENSATION
GAIN
CLOSED LOOP
GAIN
G
FREQUENCY (Hz)
20LOG
(V
IN
/
V
OSC
)
MODULATOR
GAIN
FIGURE 13. ASYMPTOTIC BODE PLOT OF CONVERTER GAIN
V
TRAN
ESL
dI
--------------------
×
ESR
I
TRAN
×
+
=
HIP6028
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