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参数资料
| 型号： | HIP6301CBZ |
| 厂商： | Intersil |
| 文件页数： | 9/17页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM 20-SOIC |
| 标准包装： | 380 |
| PWM 型： | 控制器 |
| 输出数： | 1 |
| 频率 - 最大： | 336kHz |
| 占空比： | 75% |
| 电源电压： | 4.75 V ~ 5.25 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | 0°C ~ 70°C |
| 封装/外壳： | 20-SOIC（0.295"，7.50mm 宽） |
| 包装： | 管件 |
HIP6301
For the first 32 PWM switching cycles, the DAC output
remains inhibited and the PWM outputs remain three stated.
From the 33rd cycle and for another, approximately 150
cycles the PWM output remains low, clamping the lower
output MOSFETs to ground, see Figure 3. The time
variability is due to the Error Amplifier, Sawtooth Generator
and Comparators moving into their active regions. After this
short interval, the PWM outputs are enabled and increment
the PWM pulse width from zero duty cycle to operational
pulse width, thus allowing the output voltage to slowly reach
the CORE voltage. The CORE voltage will reach its
programmed value before the 2048 cycles, but the PGOOD
output will not be initiated until the 2048th PWM switching
cycle.
The Soft-Start time or delay time, DT = 2048/F SW . For an
oscillator frequency, F SW , of 200kHz, the first 32 cycles or
160 μ s, the PWM outputs are held in a three state level as
explained above. After this period and a short interval
described above, the PWM outputs are initiated and the
voltage rises in 10.08ms, for a total delay time DT of
10.24ms.
Figure 3 shows the start-up sequence as initiated by a fast
rising 5V supply, V CC, applied to the HIP6301. Note the
PWM 1
OUTPUT
DELAY TIME
PGOOD
V CORE
5V
V CC
V IN = 12V
FIGURE 3. START-UP OF 4 PHASE SYSTEM OPERATING AT
500kHz
V COMP
short rise to the three state level in PWM 1 output during first
32 PWM cycles.
Figure 4 shows the waveforms when the regulator is
operating at 200kHz. Note that the Soft-Start duration is a
function of the Channel Frequency as explained previously.
Also note the pulses on the COMP terminal. These pulses
are the current correction signal feeding into the comparator
input (see the Block Diagram on page 2).
DELAY TIME
PGOOD
V CORE
5V
V CC
Figure 5 shows the regulator operating from an ATX supply.
In this figure, note the slight rise in PGOOD as the 5V supply
rises. The PGOOD output stage is an open drain NMOS
transistor. On rising V CC , the pull-up resistor begins to move
PGOOD output slightly positive before the NMOS transistor
pulls “down”, generating the slight rise in PGOOD output
voltage.
Note that Figure 5 shows the 12V gate driver voltage
available before the 5V supply to the HIP6301 has reached
its threshold level. If conditions were reversed and the 5V
supply was to rise first, the start-up sequence would be
different. In this case the HIP6303 will sense an overcurrent
condition due to charging the output capacitors. The supply
V IN = 12V
FIGURE 4. START-UP OF 4 PHASE SYSTEM OPERATING AT
200kHz
12V ATX
SUPPLY
PGOOD
V CORE
will then restart and go through the normal Soft-Start cycle.
5 V ATX
SUPPLY
V IN = 5V, CORE LOAD CURRENT = 31A
FREQUENCY 200kHz
ATX SUPPLY ACTIVATED BY ATX “PS-ON PIN”
FIGURE 5. SUPPLY POWERED BY ATX SUPPLY
9
FN4765.6
December 27, 2004
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相关代理商/技术参数 |
参数描述 |
|---|---|
| HIP6301CBZA-T | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Microprocessor CORE Voltage Regulator Multi-Phase Buck PWM Controller |
| HIP6301CBZ-T | 功能描述:电流型 PWM 控制器 FLEXIBLE 2-4 PHS SYNCH BUCK CNTRLR RoHS:否 制造商:Texas Instruments 开关频率:27 KHz 上升时间: 下降时间: 工作电源电压:6 V to 15 V 工作电源电流:1.5 mA 输出端数量:1 最大工作温度:+ 105 C 安装风格:SMD/SMT 封装 / 箱体:TSSOP-14 |
| HIP6301EVAL1 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Microprocessor CORE Voltage Regulator Multi-Phase Buck PWM Controller |
| HIP6301EVAL2 | 功能描述:电源管理IC开发工具 HIP6301 EVAL BRD RoHS:否 制造商:Maxim Integrated 产品:Evaluation Kits 类型:Battery Management 工具用于评估:MAX17710GB 输入电压: 输出电压:1.8 V |
| HIP6301V | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Microprocessor CORE Voltage Regulator Multi-Phase Buck PWM Controller |
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