- 您现在的位置：买卖IC网 > PDF目录370740 > HY5PS12423F 128Mx4|1.8V|8K|D43/D44/D54/D55|DDR II SDRAM - 512M PDF资料下载
参数资料
| 型号： | HY5PS12423F |
| 英文描述： | 128Mx4|1.8V|8K|D43/D44/D54/D55|DDR II SDRAM - 512M |
| 中文描述： | 128Mx4 | 1.8 | 8K的| D43/D44/D54/D55 |的DDR II内存- 512M |
| 文件页数： | 14/66页 |
| 文件大小： | 862K |
| 代理商： | HY5PS12423F |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页当前第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页
Rev. 0.52/Nov. 02 14
HY5PS12423(L)F
HY5PS12823(L)F
HY5PS121623(L)F
SIMPLIFIED COMMAND TRUTH TABLE
Command
CKEn-1
CKEn
CS
RAS
CAS
WE
ADDR
A10/
AP
BA
Note
Extended Mode Register Set
H
H
L
L
L
L
OP code
1,2
Mode Register Set
H
H
L
L
L
L
OP code
1,2
Device Deselect
H
X
H
X
X
X
X
1
No Operation
L
H
H
H
Bank Active
H
H
L
L
H
H
RA
V
1
Read
H
H
L
H
L
H
CA
L
V
1
Read with Autoprecharge
H
1,3
Write
H
H
L
H
L
L
CA
L
V
1
Write with Autoprecharge
H
1,4
Precharge All Banks
H
H
L
L
H
L
X
H
X
1,5
Precharge selected Bank
L
V
1
Auto Refresh
H
H
L
L
L
H
X
1
Self Refresh
Entry
H
L
L
L
L
H
X
1
Exit
L
H
H
X
X
X
1
L
H
H
H
Power Down
Mode
Entry
H
L
H
X
X
X
X
1
L
H
H
H
1
Exit
L
H
H
X
X
X
1
L
H
H
H
1
Note :
1. All DDR II commands are defined by states of CS, RAS, CAS, WE and CKE at the rising edge of the clock.
2. Bank addresses BA0, BA1, BA2 (BA) determine which bank is to be operated upon. For (E)MRS BA selects an (Extended) Mode
Registers.
3. Burst reads or writes at BL=4 cannot be terminated. See sections “Reads interrupted by a Read” and “Write interrupted by a
Write” in 3.2.4 for details.
4. The Power Down Mode does not perform any refresh operations. The duration of Power Down is therefore limited by the refresh
requirements outlined in section
5. The state of ODT does not affect the states described in this table. The ODT function is not available during Self Refresh. See
Section
6. “X” means “H or L(but a defined logic level)”.
( H=Logic High Level, L=Logic Low Level, X=Don’t Care, V=Valid Data Input, OP Code=Operand Code, NOP=No Operation )
相关PDF资料 |
PDF描述 |
|---|---|
| HY5PS12423LF | 128Mx4|1.8V|8K|D43/D44/D54/D55|DDR II SDRAM - 512M |
| HY5PS12823F | 64Mx8|1.8V|8K|D43/D44/D54/D55|DDR II SDRAM - 512M |
| HY5PS12823LF | 64Mx8|1.8V|8K|D43/D44/D54/D55|DDR II SDRAM - 512M |
| HY5P | Current Transducers HY 5 to 25-P/SP1 |
| HY5R256HC | -|2.5V|8K|40|Direct RDRAM - 256M |
相关代理商/技术参数 |
参数描述 |
|---|---|
| HY5PS12423LF | 制造商:未知厂家 制造商全称:未知厂家 功能描述:128Mx4|1.8V|8K|D43/D44/D54/D55|DDR II SDRAM - 512M |
| HY5PS12821AF | 制造商:HYNIX 制造商全称:Hynix Semiconductor 功能描述:512Mb DDR2 SDRAM |
| HY5PS12821AF-C3 | 制造商:HYNIX 制造商全称:Hynix Semiconductor 功能描述:512Mb DDR2 SDRAM |
| HY5PS12821AF-C4 | 制造商:HYNIX 制造商全称:Hynix Semiconductor 功能描述:512Mb DDR2 SDRAM |
| HY5PS12821AF-E3 | 制造商:HYNIX 制造商全称:Hynix Semiconductor 功能描述:512Mb DDR2 SDRAM |
发布紧急采购，3分钟左右您将得到回复。