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| 型号： | HY5R256HC |
| 英文描述： | -|2.5V|8K|40|Direct RDRAM - 256M |
| 中文描述： | - |为2.5V | 8K的| 40 |直接RDRAM的- 256M |
| 文件页数： | 1/64页 |
| 文件大小： | 4542K |
| 代理商： | HY5R256HC |
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1
Direct RDRAM
256/288-Mbit (512Kx16/18x32s) Preliminary
Rev. 0.9 / Dec.2000
Overview
The Rambus Direct RDRAM is a general purpose high-
performance memory device suitable for use in a broad
range of applications including computer memory, graphics,
video, and any other application where high bandwidth and
low latency are required.
The 256/288-Mbit Direct Rambus DRAMs (RDRAM
)
are
extremely high-speed CMOS DRAMs organized as 16M
words by 16 or 18 bits. The use of Rambus Signaling Level
(RSL) technology permits 600MHz to 800MHz transfer
rates while using conventional system and board design
technologies. Direct RDRAM devices are capable of
sustained data transfers at 1.25 ns per two bytes (10ns per
sixteen bytes).
The architecture of the Direct RDRAMs allows the highest
sustained bandwidth for multiple, simultaneous randomly
addressed memory transactions. The separate control and
data buses with independent row and column control yield
over 95% bus efficiency. The Direct RDRAM's 32 banks
support up to four simultaneous transactions.
System oriented features for mobile, graphics and large
memory systems include power management, byte masking,
and x18 organization. The two data bits in the x18 organiza-
tion are general and can be used for additional storage and
bandwidth or for error correction.
Features
0
Highest sustained bandwidth per DRAM device
- 1.6GB/s sustained data transfer rate
- Separate control and data buses for maximized
efficiency
- Separate row and column control buses for
easy scheduling and highest performance
- 32 banks: four transactions can take place simul-
taneously at full bandwidth data rates
0
Low latency features
- Write buffer to reduce read latency
- 3 precharge mechanisms for controller flexibility
- Interleaved transactions
0
Advanced power management:
- Multiple low power states allows flexibility in power
consumption versus time to transition to active state
- Power-down self-refresh
0
Organization: 2Kbyte pages and 32 banks, x 16/18
- x18 organization allows ECC configurations or
increased storage/bandwidth
- x16 organization for low cost applications
0
Uses Rambus Signaling Level (RSL) for up to 800MHz
operation
The
256
/
288
-Mbit Direct RDRAMs are offered in a uBGA
package suitable for desktop as well as low-profile add-in
card and mobile applications.
Direct RDRAMs operate from a 2.5 volt supply.
Key Timing Parameters / Part Numbers
Figure 1: Direct RDRAM uBGA Package
Organization
a
a. The bank “32s” designation indicates that this RDRAM core is
composed of 32 banks which use a “split” bank architecture.
I/O Freq.
MHz
Core Access Time
(ns)
Part
Number
512
Kx16x32s
600
53
HY5R
256
HC653
512
Kx16x32s
711
45
HY5R
256
HC745
512
Kx16x32s
800
45
HY5R
256
HC845
512
Kx16x32s
800
40
HY5R
256
HC840
512
Kx18x32s
600
53
HY5R
288
HC653
512
Kx18x32s
711
45
HY5R
288
HC745
512
Kx18x32s
800
45
HY5R
288
HC845
512
Kx18x32s
800
40
HY5R
288
HC840
This document is a general product description and is subject to change without notice. Hynix Semiconductor Inc. does not assume any responsibility for use of
circuits described. No patent licenses are implied.
相关PDF资料 |
PDF描述 |
|---|---|
| HY5R288HC | -|2.5V|8K|40|Direct RDRAM - 288M |
| HY5V16CF | 1Mx16|3.3V|4K|H|SDR SDRAM - 16M |
| HY5V16CF-H | x16 SDRAM |
| HY5V16CF-S | x16 SDRAM |
| HY6116-10 | x8 SRAM |
相关代理商/技术参数 |
参数描述 |
|---|---|
| HY5S2B6DLF-BE | 制造商:HYNIX 制造商全称:Hynix Semiconductor 功能描述:4Banks x 2M x 16bits Synchronous DRAM |
| HY5S2B6DLFP-BE | 制造商:HYNIX 制造商全称:Hynix Semiconductor 功能描述:4Banks x 2M x 16bits Synchronous DRAM |
| HY5S2B6DLFP-SE | 制造商:HYNIX 制造商全称:Hynix Semiconductor 功能描述:4Banks x 2M x 16bits Synchronous DRAM |
| HY5S2B6DLF-SE | 制造商:HYNIX 制造商全称:Hynix Semiconductor 功能描述:4Banks x 2M x 16bits Synchronous DRAM |
| HY5S5B2BLF-6E | 制造商:HYNIX 制造商全称:Hynix Semiconductor 功能描述:256M (8Mx32bit) Mobile SDRAM |
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