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| 型号： | HY5PS1G831CLFP-S5 |
| 厂商： | HYNIX SEMICONDUCTOR INC |
| 元件分类： | DRAM |
| 英文描述： | 1Gb DDR2 SDRAM |
| 中文描述： | 128M X 8 DDR DRAM, 0.45 ns, PBGA60 |
| 封装： | ROHS COMPLIANT, FBGA-60 |
| 文件页数： | 26/37页 |
| 文件大小： | 539K |
| 代理商： | HY5PS1G831CLFP-S5 |
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Rev. 0.2 / Dec 2006
26
HY5PS1G431C(L)FP
HY5PS1G831C(L)FP
HY5PS1G1631C(L)FP
4. Differential data strobe
DDR2 SDRAM pin timings are specified for either single ended mode or differential mode depending on the
setting of the EMRS “Enable DQS” mode bit; timing advantages of differential mode are realized in system
design. The method by which the DDR2 SDRAM pin timings are measured is mode dependent. In single
VREF. In differential mode, these timing relationships are measured relative to the crosspoint of DQS and its
complement, DQS. This distinction in timing methods is guaranteed by design and characterization. Note that
when differential data strobe mode is disabled via the EMRS, the complementary pin, DQS, must be tied
externally to VSS through a 20 ohm to 10 K ohm resistor to insure proper operation.
5. AC timings are for linear signal transitions. See System Derating for other signal transitions.
6. These parameters guarantee device behavior but they are not necessarily tested on each device. They
may be guaranteed by device design or tester correlation.
7. All voltages referenced to VSS.
8. Tests for AC timing, IDD, and electrical (AC and DC) characteristics, may be conducted at nominal refer-
ence/supply voltage levels, but the related specifications and device operation are guaranteed for the full
voltage range specified.
t
DS
t
DS
t
DH
t
WPRE
t
WPST
t
DQSH
t
DQSL
DQS
DQS
D
DMin
DQS/
DQS
DQ
DM
t
DH
Figure -- Data input (write) timing
DMin
DMin
DMin
D
D
D
V
IH
(ac)
V
IL
(ac)
V
IH
(ac)
V
IL
(ac)
V
IH
(dc)
V
IL
(dc)
V
IH
(dc)
V
IL
(dc)
t
CH
t
CL
CK
CK
CK/CK
DQS/DQS
DQ
DQS
DQS
t
RPST
Q
t
RPRE
t
DQSQmax
t
QH
t
QH
t
DQSQmax
Figure -- Data output (read) timing
Q
Q
Q
相关PDF资料 |
PDF描述 |
|---|---|
| HY5PS1G831CLFP-Y5 | 1Gb DDR2 SDRAM |
| HY5PS1G821LM-E3 | 1Gb DDR2 SDRAM(DDP) |
| HY5PS1G821M | 1Gb DDR2 SDRAM(DDP) |
| HY5PS1G821M-C4 | 1Gb DDR2 SDRAM(DDP) |
| HY5PS1G821M-E3 | 1Gb DDR2 SDRAM(DDP) |
相关代理商/技术参数 |
参数描述 |
|---|---|
| HY5PS1G831CLFP-Y5 | 制造商:HYNIX 制造商全称:Hynix Semiconductor 功能描述:1Gb DDR2 SDRAM |
| HY5PS1G831F | 制造商:HYNIX 制造商全称:Hynix Semiconductor 功能描述:1Gb DDR2 SDRAM |
| HY5PS1G831F-C4 | 制造商:HYNIX 制造商全称:Hynix Semiconductor 功能描述:1Gb DDR2 SDRAM |
| HY5PS1G831F-C5 | 制造商:HYNIX 制造商全称:Hynix Semiconductor 功能描述:1Gb DDR2 SDRAM |
| HY5PS1G831F-E3 | 制造商:HYNIX 制造商全称:Hynix Semiconductor 功能描述:1Gb DDR2 SDRAM |
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