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参数资料
| 型号： | HYMD264G726A4-H |
| 厂商： | HYNIX SEMICONDUCTOR INC |
| 元件分类： | DRAM |
| 英文描述： | 64M X 72 DDR DRAM MODULE, 0.75 ns, DMA184 |
| 封装： | 5.250 X 1.700 X 0.150 INCH, DIMM-184 |
| 文件页数： | 4/16页 |
| 文件大小： | 257K |
| 代理商： | HYMD264G726A4-H |
HYMD264G726A(L)4-M/K/H/L
Rev. 0.2/May. 02
12
SIMPLIFIED COMMAND TRUTH TABLE
Note :
1. DM states are Don’t Care. Refer to below Write Mask Truth Table.
2. OP Code(Operand Code) consists of A0~A12 and BA0~BA1 used for Mode Registering duing Extended MRS or MRS.
Before entering Mode Register Set mode, all banks must be in a precharge state and MRS command can be issued after tRP
period from Prechagre command.
3. If a Read with Autoprecharge command is detected by memory component in CK(n), then there will be no command presented
to activated bank until CK(n+BL/2+tRP).
4. If a Write with Autoprecharge command is detected by memory component in CK(n), then there will be no command presented
to activated bank until CK(n+BL/2+1+tDPL+tRP). Last Data-In to Prechage delay(tDPL) which is also called Write Recovery Time
(tWR) is needed to guarantee that the last data has been completely written.
5. If A10/AP is High when Row Precharge command being issued, BA0/BA1 are ignored and all banks are selected to be
precharged.
Command
CKEn-1
CKEn
/CS
/RAS
/CAS
/WE
ADDR
A10/
AP
BA
Note
Extended Mode Register Set
H
X
LLLL
OP code
1,2
Mode Register Set
H
X
LLLL
OP code
1,2
Device Deselect
HX
H
XXX
X1
No Operation
L
H
Bank Active
H
X
L
H
RA
V
1
Read
H
X
LHLH
CA
L
V
1
Read with Autoprecharge
H1,3
Write
HX
L
H
L
CA
L
V
1
Write with Autoprecharge
H1,4
Precharge All Banks
HX
L
H
L
X
HX
1,5
Precharge selected Bank
LV
1
Read Burst Stop
H
X
L
H
L
X
1
Auto Refresh
H
L
H
X
1
Self Refresh
Entry
H
L
LLL
H
X
1
Exit
L
H
XXX
1
L
HHH
Precharge
Power Down
Mode
Entry
H
L
H
XXX
X
1
L
HHH
1
Exit
L
H
XXX
1
L
HHH
1
Active Power
Down Mode
Entry
H
L
H
XXX
X
1
L
VVV
1
Exit
L
H
X
1
( H=Logic High Level, L=Logic Low Level, X=Don’t Care, V=Valid Data Input, OP Code=Operand Code, NOP=No Operation )
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相关代理商/技术参数 |
参数描述 |
|---|---|
| HYMD264G726A4-K | 制造商:HYNIX 制造商全称:Hynix Semiconductor 功能描述:Registered DDR SDRAM DIMM |
| HYMD264G726A4-L | 制造商:HYNIX 制造商全称:Hynix Semiconductor 功能描述:Registered DDR SDRAM DIMM |
| HYMD264G726A4M | 制造商:未知厂家 制造商全称:未知厂家 功能描述:64Mx72|2.5V|M/K/H/L|x18|DDR SDRAM - Low Profile Registered DIMM 512MB |
| HYMD264G726A4-M | 制造商:HYNIX 制造商全称:Hynix Semiconductor 功能描述:Registered DDR SDRAM DIMM |
| HYMD264G726A4M-H | 制造商:HYNIX 制造商全称:Hynix Semiconductor 功能描述:Low Profile Registered DDR SDRAM DIMM |
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