参数资料
型号: I2042A-08ST
元件分类: 时钟及定时
英文描述: 2042 SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
封装: SOIC-8
文件页数: 3/8页
文件大小: 354K
代理商: I2042A-08ST
August 2005
P2042A
rev 1.3
Notice: The information in this document is subject to change without notice.
LCD Panel EMI Reduction IC
3 of 8
Spread Spectrum Selection
The Modulation Selection Table defines the possible spread spectrum options. The optimal setting should minimize system
EMI to the fullest without affecting system performance. The spreading is described as a percentage deviation of the center
frequency. (Note: The center frequency is the frequency of the external reference input on CLKIN, pin1).
For example, P2042A is designed for high-resolution, flat panel applications and is able to support an XGA (1024 x 768) flat
panel operating at 65MHz (FIN) clock speed. A spreading selection of CP0=0, CP1=1 and SR0=0 provides a percentage
deviation of ±1.00% from FIN. This results in the frequency on ModOUT being swept from 65.65 to 64.35MHz at a modulation
rate of 101.54KHz. Refer Modulation Selection Table. The example in the following illustration is a common EMI reduction
method for a notebook LCD panel and has already been implemented by most of the leading OEM and mobile graphic
accelerator manufacturers.
Application Schematic for Mobile LCD Graphics Controllers
Modulated 65MHz signal with
±1.00% deviation and
modulation rate of 101.54KHz.
This signal is connected back to
the spread spectrum input pin
(SSIN) of the graphics
accelerator.
1
2
3
4
CLKIN
CP0
CP1
VSS
SR0
5
6
7
8
SSON#
ModOUT
VDD
65MHz from graphics accelerator
+3.3V
0.1F
P2042A
Digital control for the SS enable
or disable
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I2042AG-08TT 2042 SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
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