参数资料
型号: IA88C00-PLC68I-R-01
厂商: Innovasic Semiconductor
文件页数: 60/80页
文件大小: 0K
描述: IC MCU 8BIT 20MHZ 68PLCC
标准包装: 285
芯体尺寸: 8-位
速度: 20MHz
连通性: EBI/EMI,UART/USART
外围设备: DMA,WDT
输入/输出数: 32
程序存储器类型: 外部程序存储器
电压 - 电源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 68-LCC(J 形引线)
包装: 管件
IA88C00
Data Sheet
Microcontroller
As of Production Version -01
Copyright 2005
ENG21 1 030617-04
www.Innovasic
Innovasic.com
Innovasic Semiconductor
Page 63 of 80
1.888.824.4184
Pins
The UART uses the following Port 2 and 3 pins:
Figure 61. Port 2 and 3 Pins
Port/Pin
UART Function
2/0
Receive Clock
3/0
Receive Data
2/1
Transmit Clock
3/1
Transmit Data
Transmitter
Data is output on the UART when the UART’s register is specified as the destination (dst) of an
operation. This automatically adds the start bit, the programmed parity bit and the programmed number of
stop bits. It can also add a wake-up bit if that option is selected.
The extra bits in R239 are ignored if the UART is programmed to a 5-, 6-, or 7-bit character.
Depending on the programmed data rate, serial data is transmitted at a rate equal to 1, 1\16, 1\32 or 1\64
of the transmitter clock rate. All data is sent out on the falling edge of the clock input.
When the UART has no data to send, it holds the output marking (High). It can be programmed with the
Send Break command to hold the output marking Low (Spacing). This output marking continues until the
command is cleared.
Receiver
The UART begins receive operation when Receive Enable (URC, bit 0) is set to High. After this, a Low
on the receive input pin for longer than half a bit time is interpreted as a start bit. The UART samples the
data on the input pin in the middle of each clock cycle until a complete byte is assembled. This completed
byte is placed in the Receive Data register.
If the 1X clock mode is selected, external bit synchronization must be provided, and the input data is
sampled on the rising edge of the clock.
For character lengths of less than eight bits, the UART inserts 1s into the unused bits. And if parity is
enabled, the parity bit is not stripped. The data bits, extra 1s and the parity bits are placed in the UART
Data register (UIO).
While the UART is assembling a byte in its input shift register, the CPU has time to service an interrupt
and manipulate the data character in UIO.
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