- 您现在的位置：买卖IC网 > PDF目录378599 > IA88C00-PLC68I-R (Innovasic Semiconductor) Microcontroller PDF资料下载
参数资料
| 型号： | IA88C00-PLC68I-R |
| 厂商： | Innovasic Semiconductor |
| 英文描述： | Microcontroller |
| 中文描述： | 微控制器 |
| 文件页数： | 34/80页 |
| 文件大小： | 707K |
| 代理商： | IA88C00-PLC68I-R |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页当前第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页
IA88C00
Microcontroller
Data Sheet
As of Production Version -01
Copyright
2005 ENG 21 0 050519-00 www.Innovasic
Innovasic.com
Innovasic Semiconductor
Page 34 of 80 1.888.824.4184
D4 - FERR - Framing Error
- This is a status bit. If a framing error occurs (no stop bit where expected),
this bit is set for the receive character in which the framing error occurred. This bit remains set until
cleared to 0 by writing a 1 to this bit position.
D5 - BRKD - Break Detect
- This is a status bit that is set at the beginning and the end of a break
sequence in the receive data stream. It stays set to 1 until cleared to 0 by writing a 1 to this bit position.
A break signal is a sequence of 0s. When all the required bits, parity bit, wake-up bit, and stop bits are 0x,
the receiver immediately recognizes a break condition (not a framing error) and causes Break Detect
(BRKD) to be set and an interrupt request. At the end of the break signal, a zero character is loaded into
the Receive Data Register (UIOR) and Break Detect is set again, along with another interrupt request.
D6 - CCD - Control Character Detect
- This status bit is set any time an ASCII control character is
received in the receive data stream. It stays set until cleared to 0 by writing a 1 to this bit position. (An
ASCII control character is any character that has bits 5 and 6 set to 0.)
D7 - WUD - Wake-Up Detect
- This status bit is set any time a valid wake-up condition is detected at the
receiver. It stays set until cleared to 0 by writing a 1 to this bit position. The wake-up condition can be
satisfied in many possible ways by the Wake-up bit, Wake-up Match register, and Wake-Up Mask
register.
Figure 31. UART Interrupt Enable (UIE), R237 Bank 0
Bit
7
D7
0
R/W
6
D6
0
R/W
5
D5
0
R/W
4
D4
0
R/W
3
D3
0
R/W
2
D2
0
R/W
1
D1
0
R/W
0
D0
0
R/W
Initial Value
Read/Write
D0 - RCAIE - Receive Character Available Interrupt Enable
- If this bit is set to 1, a Receive
Character Available status in the URC register will cause an interrupt request. In a DMA receive
operation, if this bit is set to 1, an interrupt request will be issued only if an End-of-Process (EOP) of the
DMA counter is also set. If it is not set, a Receive Character Available status causes no interrupt.
D1 - RDMAENB - Receive DMA Enabl
e - When this bit is set to 1, the DMA function is enabled for the
UART receiver. Whenever a Receive Character Available signal in the URC register is true, a DMA
request will be made. When the DMA channel claims control of the bus, it transfers the received data to
the register file or the external memory.
D2 - TIE - Tranmit Interrupt Enable
- If this bit is set to 1, a Transmit Buffer Empty signal in the UTC
register will cause an interrupt request. In a DMA transmit operation, if this bit is set to 1, an interrupt
request will be issued only if an End-of-Process (EOP) of the DMA counter is also set. If it is not set, a
Transmit Buffer Empty signal causes no interrupt.
D3 - ZCIE - Zero Count Interrupt Enable
- If this bit is set to 1, a baud-rate generator Zero Count
status in the UTC register will cause an interrupt request.
相关PDF资料 |
PDF描述 |
|---|---|
| IBB110P | Integrated Telecom Circuits |
| IBB110PTR | Integrated Telecom Circuits |
| IBIS4-1300-M-1 | 1.3 MPxl Rolling Shutter CMOS Image Sensor |
| IBIS4-1300-M-2 | 1.3 MPxl Rolling Shutter CMOS Image Sensor |
| IBIS4-1300 | 1.3 MPxl Rolling Shutter CMOS Image Sensor |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IA88C00-PLC68I-R-01 | 功能描述:IC MCU 8BIT 20MHZ 68PLCC RoHS:是 类别:集成电路 (IC) >> 嵌入式 - 微控制器， 系列:- 标准包装:27 系列:PIC® 16C 核心处理器:PIC 芯体尺寸:8-位 速度:10MHz 连通性:I²C，SPI，UART/USART 外围设备:欠压检测/复位，POR，PWM，WDT 输入/输出数:22 程序存储器容量:14KB（8K x 14） 程序存储器类型:OTP EEPROM 大小:- RAM 容量:368 x 8 电压 - 电源 (Vcc/Vdd):4 V ~ 6 V 数据转换器:A/D 5x8b 振荡器型:外部 工作温度:-40°C ~ 125°C 封装/外壳:28-SOIC（0.295"，7.50mm 宽） 包装:管件 |
| IA8X44 | 制造商:INNOVASIC 制造商全称:INNOVASIC 功能描述:SDLC COMMUNICATIONS CONTROLLER |
| IA8X44PDW40I3 | 制造商:INNOVASIC 制造商全称:INNOVASIC 功能描述:SDLC Communications Controller |
| IA8X44PDW40IR3 | 功能描述:IC MCU 8BIT 12MHZ 40DIP RoHS:是 类别:集成电路 (IC) >> 嵌入式 - 微控制器 - 特定应用 系列:- 产品变化通告:Product Discontinuation 26/Aug/2009 标准包装:250 系列:- 应用:网络处理器 核心处理器:4Kc 程序存储器类型:- 控制器系列:- RAM 容量:16K x 8 接口:以太网，UART，USB 输入/输出数:- 电源电压:1.8V, 3.3V 工作温度:- 安装类型:表面贴装 封装/外壳:208-LQFP 包装:带卷 (TR) 供应商设备封装:PG-LQFP-208 其它名称:SP000314382 |
| IA8X44PLC44I3 | 制造商:Innovasic Inc 功能描述:5 V Serial Interface SDLC Communications Controller - PLCC-44 |
发布紧急采购，3分钟左右您将得到回复。