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| 型号： | IBM39STB02100PBA22C |
| 元件分类： | 消费家电 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PBGA352 |
| 封装： | PLASTIC, BGA-352 |
| 文件页数： | 37/39页 |
| 文件大小： | 503K |
| 代理商： | IBM39STB02100PBA22C |
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IBM39STB0210x
Advance
STB0210x Digital Set-Top Box Integrated Controllers
STB02_sds_0327.fm.01
March 27, 2000
Architecture and Subsystem Information
Page 7 of 39
Each DMA channel has an independent set of registers for data transfer. The registers store data for control,
source address, destination address, and transfer count. Each channel also supports chained DMA opera-
tions, therefore every channel also includes a chained count register in which case source address registers
function as chained address registers. All DMA channels report their status to the DMA execution unit.
The DMA controller also supports:
Internal DMA channels for smart card interface, 16550 serial communications controller, infrared commu-
nications controller, etc.
16- and 32-bit peripherals (on-chip peripheral bus and external)
32-bit addressing
Address increment or decrement
Internal data buffering capability
Memory-mapped peripherals
Processor Local Bus
The Processor Local Bus (PLB) interfaces directly with the PPC401B3 and the other major subsystems (see
“Block Diagram,” on page 4). The STB0210x uses two PLBs to provide high bandwidth between the function
masters and the external memory interfaces for ROM, Flash, and SDRAM, etc. The STB0210x PLB architec-
ture includes a crossbar switch to present both memory interfaces as flat, shared memory spaces
.
External Bus Interface Unit
The External Bus Interface Unit (EBIU) expands the local bus to transfer data between the PLB and a wide
range of memory and peripheral devices attached to the external bus (see the following list). The EBIU can
control up to eight devices or banks or regions of FLASH memory (128 MB), and a low latency maximizes
system performance.
The EBIU supports:
A direct connect SRAM/ROM/PIA interface for
- up to eight SRAM/ROM/PIA banks with programmable address select
- programmable or device-paced wait states
- burst mode (BME) and single-cycle transfers
16- and 32-bit byte addressable bus width
Programmable target word rst or sequential cache line lls
DVB Common Interface Support
IDE interface supports:
- ATA-3 mode 4, register, and PIO
- Mode 2 Multiword DMA transfers (see ANSI X3.298-1997, AT Attachment-3 Interface (ATA-3))
- Multi-word DMA (15.5 MB/s maximum transfer rate)
External bus master with support for device master and master/slave
Common bank-specic programmability
Device-paced ready input
SDRAM Controller
The SDRAM Controller transfers data between the PLB and up to two SDRAM memory banks attached to the
external bus. The Controller implements address and data pipelining and supports 16Mb and 64Mb
SDRAMS concurrently. It also provides the following:
Direct-connect SDRAM interface
相关PDF资料 |
PDF描述 |
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| IBM39STB02101PBA22C | SPECIALTY CONSUMER CIRCUIT, PBGA352 |
| IC-632-ZHGT | DIP32, IC SOCKET |
| IC-310-SST | DIP10, IC SOCKET |
| IC-314-AGT | DIP14, IC SOCKET |
| IC-422-AGT | DIP22, IC SOCKET |
相关代理商/技术参数 |
参数描述 |
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| IBM39STB02500PBA05CA | 制造商:IBM 功能描述: |
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| IBM39STB13000PFA16C | 制造商:IBM 功能描述: 制造商:IBM CORPORATION 功能描述: |
| IBM39STB13010PFA16C | 制造商:未知厂家 制造商全称:未知厂家 功能描述: |
| IBM403GCX-3BC80C2 | 制造商:IBM 功能描述:RISC PROCESSOR, 160 Pin Plastic BGA |
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