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| 型号： | IBM39STB02101PBA22C |
| 元件分类： | 消费家电 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PBGA352 |
| 封装： | PLASTIC, BGA-352 |
| 文件页数： | 5/39页 |
| 文件大小： | 503K |
| 代理商： | IBM39STB02101PBA22C |
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IBM39STB0210x
Advance
STB0210x Digital Set-Top Box Integrated Controllers
STB02_sds_0327.fm.01
March 27, 2000
Architecture and Subsystem Information
Page 13 of 39
Pulse Width Modulation
The pulse width modulation (PWM) function produces two square wave outputs with a variable duty cycle
under program control. The duty cycle varies from 100 percent to zero percent in steps of 1/256. There is a
control register with two bits for each PWM. This register controls the active status of the PWM, and deter-
mines what its inactive output level should be. When the PWM control register is set to disable a PWM, the 8-
bit period counter will be inactive to minimize power.
The pulse width modulation portion of the GPT contains two identical blocks, each containing an 8-bit pro-
grammable and reloadable down counter and control logic. A time-base generator that is a free-running
counter (TCLK based) generates the frequency of the pulse-width modulated output.
IInter-Integrated Circuit (IIC) Unit
The IIC unit is used to provide a simple to use, highly programmable interface between the OPB and the
industry standard IIC serial bus. They provide full management of all IIC bus protocols, compliant with Phillips
Semiconductors I2C Specication, dated 1995, and support a xed VDD IIC interface. It can be programmed
to operate as master, as slave, or as both master and slave on the IIC interface. In addition to sophisticated
IIC bus protocol management, the IIC provide full data buffering between the OPB and the IIC bus.
The IIC unit offers 5 V tolerant I/O for both 100- and 400-kHz operation with 8-bit data transfers and 7-bit and
10-bit address decode/generation. There is one programmable interrupt request signal, two independent 4 x
1-byte data buffers, and 12 memory-mapped, fully programmable configuration registers.
Smart Card Interface Unit
The Smart Card Interface Unit handles communications between an Integrated Circuit Card and the host
CPU. These 5 V tolerant I/O devices have a software-based control structure and are designed for use with
asynchronous transmissions. It features hardware activation/deactivation and reset with software overrides
and byte-wide FIFO support. It is compatible with ISO/IEC 7816-3 and support T0 and T1 protocols. The
Interface Unit support 2-channel DMA with 8-bit memory-mapped registers and hardware error checking. An
Inter-Character Time-out Facility provides timing support from the GPT/PWM.
16550 Serial Communication Controller
The 16550 Serial Communication Controller is a universal asynchronous receiver/transmitter (UART) with
FIFOs, and is compatible with the 16550 part numbers manufactured by National Semiconductor (NS) Corpo-
ration. It is also compatible with National Semiconductor 16450 (non-FIFO version). Serial interface charac-
teristics are fully programmable with complete modem control functions and status reporting capability. The
controller supports:
5-, 6-, 7-, or 8-bit characters
Even, odd, or no parity bit generation and detection
1-, 1.5-, or 2-stop-bit generation
Variable baud rate and a programmable baud rate generator
There is also support for two DMA channels with a 16-byte FIFO for transmit/receive path. Internal loopback
is provided for diagnostics and an Inter-Character Timeout Facility provides timing support from the
GPT/PWM.
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相关代理商/技术参数 |
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