参数资料
型号: ICL7135CPI
厂商: Intersil
文件页数: 7/15页
文件大小: 0K
描述: IC CONV A/D 4 1/2 DIGIT 28-DIP
标准包装: 13
系列: *
其它名称: ICL7135CPIIS
NT5015
ICL7135
R INT = -------------------------------------------- .
C INT = ? ---------------------------------------------------------------------------------- ?
= --------------------------------------------------------------------------------- .
Digit Drives (Pins 12, 17, 18, 19 and 20)
Each digit drive is a positive going signal that lasts for 200 clock
pulses. The scan sequence is D5 (MSD), D4, D3, D2, and D1
(LSD). All five digits are scanned and this scan is continuous
unless an overrange occurs. Then all digit drives are blanked
from the end of the strobe sequence until the beginning of
Reference Integrate when D5 will start the scan again. This can
give a blinking display as a visual indication of overrange.
BCD (Pins 13, 14, 15 and 16)
The Binary coded Decimal bits B8, B4, B2, and B1 are
positive logic signals that go on simultaneously with the digit
driver signal.
Component Value Selection
For optimum performance of the analog section, care must
be taken in the selection of values for the integrator
capacitor and resistor, auto-zero capacitor, reference
voltage, and conversion rate. These values must be chosen
to suit the particular application.
Integrating Resistor
The integrating resistor is determined by the full scale input
voltage and the output current of the buffer used to charge
the integrator capacitor. Both the buffer amplifier and the
integrator have a class A output stage with 100 μ A of
quiescent current. They can supply 20 μ A of drive current
with negligible non-linearity. Values of 5 μ A to 40 μ A give
good results, with a nominal of 20 μ A, and the exact value of
integrating resistor may be chosen by:
full scale voltage
20 μ A
Integrating Capacitor
The product of integrating resistor and capacitor should be
selected to give the maximum voltage swing which ensures
that the tolerance built-up will not saturate the integrator
swing (approx. 0.3V from either supply). For ± 5V supplies
and analog COMMON tied to supply ground, a ± 3.5V to ± 4V
full scale integrator swing is fine, and 0.47 μ F is nominal. In
general, the value of C lNT is given by:
? 10,000 × clock period × I INT ? ,
? ?
(10,000) (clock period) (20 μ A)
integrator output voltage swing
A very important characteristic of the integrating capacitor is
that it has low dielectric absorption to prevent roll-over or
ratiometric errors. A good test for dielectric absorption is to
use the capacitor with the input tied to the reference.
This ratiometric condition should read half scale 0.9999, and
any deviation is probably due to dielectric absorption.
Polypropylene capacitors give undetectable errors at
reasonable cost. Polystyrene and polycarbonate capacitors
may also be used in less critical applications.
7
Auto-Zero and Reference Capacitor
The physical size of the auto-zero capacitor has an influence
on the noise of the system. A larger capacitor value reduces
system noise. A larger physical size increases system noise.
The reference capacitor should be large enough such that
stray capacitance to ground from its nodes is negligible.
The dielectric absorption of the reference cap and auto-zero
cap are only important at power-on or when the circuit is
recovering from an overload. Thus, smaller or cheaper caps
can be used here if accurate readings are not required for
the first few seconds of recovery.
Reference Voltage
The analog input required to generate a full scale output is
V lN = 2V REF .
The stability of the reference voltage is a major factor in the
overall absolute accuracy of the converter. For this reason, it
is recommended that a high quality reference be used where
high-accuracy absolute measurements are being made.
Rollover Resistor and Diode
A small rollover error occurs in the ICL7135, but this can be
easily corrected by adding a diode and resistor in series
between the INTegrator OUTput and analog COMMON or
ground. The value shown in the schematics is optimum for
the recommended conditions, but if integrator swing or clock
frequency is modified, adjustment may be needed. The
diode can be any silicon diode such as 1N914. These
components can be eliminated if rollover error is not
important and may be altered in value to correct other
(small) sources of rollover as needed.
Max Clock Frequency
The maximum conversion rate of most dual-slope A/D
converters is limited by the frequency response of the
comparator. The comparator in this circuit follows the
integrator ramp with a 3 μ s delay, and at a clock frequency of
160kHz (6 μ s period) half of the first reference integrate clock
period is lost in delay. This means that the meter reading will
change from 0 to 1 with a 50 μ V input, 1 to 2 with a 150 μ V
input, 2 to 3 with a 250 μ V input, etc. This transition at mid-
point is considered desirable by most users; however, if the
clock frequency is increased appreciably above 160kHz, the
instrument will flash “1” on noise peaks even when the input
is shorted.
For many dedicated applications where the input signal is
always of one polarity, the delay of the comparator need not
be a limitation. Since the non-linearity and noise do not
increase substantially with frequency, clock rates of up to
~1MHz may be used. For a fixed clock frequency, the extra
count or counts caused by comparator delay will be constant
and can be subtracted out digitally.
The clock frequency may be extended above 160kHz
without this error, however, by using a low value resistor in
FN3093.4
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