参数资料
型号: ICS1567M-XXX-LF
元件分类: 时钟产生/分配
英文描述: 180 MHz, VIDEO CLOCK GENERATOR, PDSO16
封装: 0.300 INCH, SOIC-16
文件页数: 8/11页
文件大小: 161K
代理商: ICS1567M-XXX-LF
Application Notes (continued)
Bus Clock Interface
In some applications, it may be desirable to utilize the bus
clock. To do this, connect the clock through a .047uF capacitor
to XTAL1 (2) and keep the lead length of the capacitor to
XTAL1 (2) to a minimum to reduce noise susceptibility. This
input is internally biased at VDD/2. Since TTL compatible
clocks typically exhibit a VOH of 3.5V, capacitively coupling
the input restores noise immunity. The ICS1567 is not sensitive
to the duty cycle of the bus clock; however, the quality of this
signal varies considerably with different motherboard designs.
As the quality of the bus clock is typically outside the control
of the graphics adapter card manufacturer, it is suggested that
this signal be buffered on the graphics adapter board. XTAL2
(3) must be left open in this configuration.
ICS1567 Interface
The ICS1567 should be located as close as possible to the video
DAC or RAMDAC. Figure 3 illustrates interfacing the
ICS1567 to a RAMDAC. The differential output CLOCK
drivers are current sourcing only and are designed to drive
resistive terminations in a complementary fashion CLK and
CLK connections should follow good ECL interconnection
practice. Terminating resistors should be as close as possible to
the RAMDAC.
Absolute Maximum Ratings
Ambient Temeperature under bias . . . . . To . . . . . . . . . . . . . 0
°C to 70°C
Supply Voltage . . . . . . . . . . . . . . . . . . . . VDD . . . . . . . . . . . -0.5V to +7V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . VIN . . . . . . . . . . . . -0.5V to VDD + 0.5V
Output Voltage. . . . . . . . . . . . . . . . . . . . . VOUT . . . . . . . . . . -0.5V to VDD + 0.5V
Clamp Diode Current. . . . . . . . . . . . . . . . VIK & IOK . . . . . .
±30mA
Output Current per Pin. . . . . . . . . . . . . . . IOUT . . . . . . . . . . .
±50mA
Storage Temperature . . . . . . . . . . . . . . . . TS . . . . . . . . . . . . . -85
°C to + 150°C
Power Dissipation . . . . . . . . . . . . . . . . . . PD. . . . . . . . . . . . . 500mW
Values beyond these ratings may damage the device. This device contains circuitry to protect the inputs and outputs against
damage due to high static voltages or electric fields; however, it is advised that normal precautions be taken to avoid applications
of any voltage higher than the maximum rated voltages. For proper operation, it is recommended that VIN and VOUT be constrained
to > = VSS and < = VDD.
Standard Test Conditions
The characteristics below apply for the following standard test conditions, unless otherwise noted. All voltages are referenced
to VSS (OV Ground). Positive current flows into the referenced pin.
Operating Temperature range
0
°C to 70°C
Power supply voltage
4.75 to 5.25 Volts
ICS1567
6
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