- 您现在的位置：买卖IC网 > PDF目录10766 > ICS1894K-32LFT (IDT, Integrated Device Technology Inc)PHYCEIVER LOW PWR 3.3V 32QFN PDF资料下载
参数资料
| 型号： | ICS1894K-32LFT |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 34/50页 |
| 文件大小： | 0K |
| 描述： | PHYCEIVER LOW PWR 3.3V 32QFN |
| 标准包装： | 1 |
| 系列： | PHYceiver™ |
| 类型： | PHY 收发器 |
| 规程： | MII，RMII |
| 电源电压： | 3.14 V ~ 3.47 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-VFQFN 裸露焊盘 |
| 供应商设备封装： | 32-VFQFPN 裸露焊盘（4x4） |
| 包装： | 标准包装 |
| 其它名称： | 800-2029-6 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页当前第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页
ICS1894-32
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
PHYCEIVER
IDT 10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
4
ICS1894-32
REV M 021512
Notes:
1. AIO: Analog input/output PAD.
IO: Digital input/output.
IN/Ipu: Digital input with internal 20k pull-up.
IN/Ipd: Digital input with internal 20k pull-down.
IO/Ipu: Digital input/output with internal 20k pull-up.
IO/Ipd: Digital input/output with internal 20k pull-down.
2. MII Rx Mode: The RXD[3..0] bits are synchronous with RXCLK. When RXDV is asserted, RXD[3..0] presents
valid data to MAC on the MII interface. RXD[3..0] is invalid when RXDV is de-asserted.
3. RMII Rx Mode: The RXD[1:0] bits are synchronous with REFIN. For each clock period in which CRS_DV is
asserted, two bits of recovered data are sent from the PHY to the MAC.
4. MII Tx Mode: The TXD[3..0] bits are synchronous with TXCLK. When TXEN is asserted, TXD[3..0] presents valid
data from the MAC on the MII interface. TXD[3..0] has no effect when TXEN is de-asserted.
5. RMII Tx Mode: The TXD[1:0] bits are synchronous with REFIN. For each clock period in which TX_EN is
asserted, two bits of data are received by the PHY from the MAC.
31
P0/LED0
IO
PHY address Bit 0 as input (during power on reset/hardware reset) and LED # 0
(function configurable, default is "activity/no activity") as output
32
P1/ISO/LED1
IO
PHY address Bit 1 as input (during power on reset/hardware reset) and LED # 1
(function configurable, default is "10/100 mode") as output; After latch, alternates as
a real time receiver isolation input.
PADDLE
VSS
Ground Connect to ground.
Pin
Number
Pin
Name
Pin
Type1
Pin Description
相关PDF资料 |
PDF描述 |
|---|---|
| 85106EC1412SX50 | CONN PLUG STRAIGHT 12POS W/SCKT |
| LM311DG | IC COMPARATOR SGL 36VDC 8-SOIC |
| VE-B4W-IV-S | CONVERTER MOD DC/DC 5.5V 150W |
| LM293DMR2G | IC COMP DUAL OFFSET LV MICRO-8 |
| MAX5174BEEE | IC DAC SERIAL V-OUT 12BIT 16QSOP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS1894K-33LF | 制造商:Integrated Device Technology Inc 功能描述:PHYCEIVER LOW PWR 3.3V 32QFN |
| ICS1894K-33LFT | 制造商:Integrated Device Technology Inc 功能描述:PHYCEIVER LOW PWR 3.3V 32QFN |
| ICS1894K-34LF | 制造商:Integrated Device Technology Inc 功能描述:PHYCEIVER LOW PWR 3.3V 32QFN |
| ICS1894K-34LFT | 制造商:Integrated Device Technology Inc 功能描述:PHYCEIVER LOW PWR 3.3V 32QFN |
| ICS1894K-40LF | 功能描述:PHYCEIVER LOW PWR 3.3V 40QFN RoHS:是 类别:集成电路 (IC) >> 接口 - 驱动器，接收器，收发器 系列:- 标准包装:250 系列:- 类型:收发器 驱动器/接收器数:2/2 规程:RS232 电源电压:3 V ~ 5.5 V 安装类型:表面贴装 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:带卷 (TR) |
发布紧急采购，3分钟左右您将得到回复。