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参数资料
型号： ICS2309MI-1LF
厂商： INTEGRATED DEVICE TECHNOLOGY INC
元件分类： 时钟及定时
英文描述： 2309 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
封装： 0.150 INCH, GREEN, SOIC-16
文件页数： 6/10页
文件大小： 238K
代理商： ICS2309MI-1LF
ICS2309
3.3 VOLT ZERO DELAY LOW SKEW BUFFER
ZERO DELAY BUFFERS
IDT / ICS 3.3 VOLT ZERO DELAY LOW SKEW BUFFER
5
ICS2309
REV F 041906
AC Electrical Characteristics
ICS2309M-1, VDD=3.3 V ±0.3 V, Ambient temperature -40 to +85
°C (Industrial), (0-70°C Commercial)
Note 2: With VDD at a steady rate and valid input at CLKIN.
ICS2309M-1H, VDD=3.3 V ±0.3 V, Ambient temperature -40 to +85
°C (Industrial), (0-70°C Commercial)
Note 3: With VDD at a steady rate and valid input at CLKIN.
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
Output Clock Frequency
fIN
10 pF load, see table on page 2
10
133
MHz
Output Clock Frequency
30 pF load, see table on page 2
10
100
MHz
Output Rise Time
tOR
0.8 to 2.0 V, outputs loaded
2.5
ns
Output Fall Time
tOF
2.0 to 0.8 V, outputs loaded
2.5
ns
Output Clock Duty Cycle
tDC
Measured at 1.4 V, Fout=66.67
MHz
40
50
60
%
Output Clock Duty Cycle
tDC
Measured at 1.4 V, Fout=50
MHz
45
50
55
%
Device to Device Skew
Rising edges at VDD/2
700
ps
Output to Output Skew
Rising edges at VDD/2
250
ps
Input to Output Skew
Rising edges at VDD/2
±350
ps
Input to Output Skew
(PLL bypass mode)
Rising edges at VDD/2, S2= 1,
S1 = 0
15
8.7
ns
Cycle to Cycle Jitter
Measured at 66.67M, outputs
loaded
200
ps
PLL Lock Time
Note 2
1.0
ms
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
Output Clock Frequency
fIN
10 pF load, see table on page 2
10
133
MHz
Output Clock Frequency
30 pF load, see table on page 2
10
100
MHz
Output Rise Time
tOR
0.8 to 2.0 V, outputs loaded
1.5
ns
Output Fall Time
tOF
2.0 to 0.8 V, outputs loaded
1.5
ns
Output Clock Duty Cycle
tDC
Measured at 1.4 V, Fout=66.67
MHz
40
50
60
%
Output Clock Duty Cycle
tDC
Measured at 1.4 V, Fout=50
MHz
45
50
55
%
Device to Device Skew
Rising edges at VDD/2
700
ps
Output to Output Skew
Rising edges at VDD/2
250
ps
Input to Output Skew
Rising edges at VDD/2
±350
ps
Input to Output Skew
(PLL bypass mode)
Rising edges at VDD/2, S2= 1,
S1 = 0
15
8.7
ns
Cycle to Cycle Jitter
Measured at 66.67M, outputs
loaded
200
ps
PLL Lock Time
Note 3
1.0
ms
相关PDF资料
PDF描述
ICS2309M-1LFT 2309 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
ICS2309M-1 2309 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
ICS2309MI-1 2309 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
ICS2309MI-1HLFT 2309 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
ICS2439-001F 80 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO24
相关代理商/技术参数
参数描述
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ICS232CPE 制造商:Intersil Corporation 功能描述:
ICS-24-.3 制造商:Maxconn 功能描述:
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ICS2402M 功能描述:IC MULTIPLIER/ZD BUFFER 8-SOIC RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:ClockBlocks™ 产品变化通告:Product Discontinuation 04/May/2011 标准包装:96 系列:- 类型:时钟倍频器，零延迟缓冲器 PLL:带旁路 输入:LVTTL 输出:LVTTL 电路数:1 比率 - 输入:输出:1:8 差分 - 输入:输出:无/无 频率 - 最大:133.3MHz 除法器/乘法器:是/无 电源电压:3 V ~ 3.6 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:管件 其它名称:23S08-5HPGG
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