参数资料
型号: ICS2402MT
元件分类: 时钟及定时
英文描述: 2402 SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
封装: 0.150 INCH, SOIC-8
文件页数: 2/7页
文件大小: 131K
代理商: ICS2402MT
Multiplier and Zero Delay Buffer
MDS 2402 D
2
Revision 122104
Integrated Circuit Systems, Inc.
525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
ICS2402
Pin Assignment
Clock Multiplier Decoding Table 1
(Multiplies Input clock by shown amount)
Pin Descriptions
ICLK
NC
GND
VDD
FBIN
S0
CLK
1
2
3
4
8
7
6
5
GND
NC
1
2
3
4
8
7
6
5
8 pin (150 mil) SOIC
S0
CLK
0
2 X ICLK
1ICLK
Pin
Number
Pin
Name
Pin
Type
Pin Description
1
ICLK
Input
Reference clock input.
2
NC
No connect. Do not connect to anything.
3
GND
Power
Connect to ground.
4
FBIN
Input
Feedback clock input.
5
NC
No connect. Do not connect to anything.
6
S0
Input
Select pin for Clock Multiplier Decoding Table above.
7
VDD
Power
Connect to +3.3 V or +5.0 V.
8
CLK
Output
Clock output per table above.
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