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参数资料
| 型号： | ICS2402MT |
| 元件分类： | 时钟及定时 |
| 英文描述： | 2402 SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
| 封装： | 0.150 INCH, SOIC-8 |
| 文件页数： | 7/7页 |
| 文件大小： | 131K |
| 代理商： | ICS2402MT |
Multiplier and Zero Delay Buffer
MDS 2402 D
7
Revision 122104
Integrated Circuit Systems, Inc.
● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
ICS2402
Revision History
Rev.
Originator
Date
Description of Change
B
P.Griffith
10/05/04
New device/datasheet for HP.
C
S. Gardner
11/04/04
Changed values for Abs. Jitter, Prop. Delay, and Output Clock Freq. in “Features” section;
removed secondary Input High/Low and Output High (CMOS) voltage specs in DC chars;
multiple updates to AC chars and added 5 V +/-10% rating; move from Preliminary to
Release.
D
P.Griffith
12/21/04
Added LF packaging and ordering information. Released from cutom to standard device.
相关PDF资料 |
PDF描述 |
|---|---|
| ICS2402M | 2402 SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
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