参数资料
型号: ICS2496M-XXX-LF
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 时钟产生/分配
英文描述: 135 MHz, VIDEO CLOCK GENERATOR, PDSO16
封装: SOIC-16
文件页数: 1/7页
文件大小: 326K
代理商: ICS2496M-XXX-LF
Dual Voltage Video/Memory Clock Generator
Description
The ICS2496 has been specifically designed to serve the
portable PC market with operation at either 3.3V or 5V with a
comprehensive power-saving shut down mode.
The ICS2496 Clock Generator is a dual phase-locked loop
frequency synthesizer capable of generating 16 video frequen-
cies and four memory clock frequencies for use with high
performance video display systems. Utilizing CMOS technol-
ogy to implement all linear, digital and memory functions, the
ICS2496 provides a low power, small footprint, low cost
solution to the generation of video dot clocks. Provision is
made via a single level custom mask to implement customer
specific frequency sets. Phase-locked loop circuitry permits
rapid glitch-free transitions between clock frequencies.
In addition to providing 16 clock rates, the ICS2496 has
provisions to multiplex an externally-generated signal source
into the VCLK signal path. Internal phase-locked frequencies
continue to remain locked at their preset values when this mode
is selected. This feature permits instantaneous transition from
an external frequency to an internally-generated frequency.
Printed circuit board testing is simplified by the use of these
modes, as an external clock generated by the ATE tester can be
fed through, permitting synchronous testing of the entire system.
Integrated
Circuit
Systems, Inc.
ICS2496
Notes:
1. ICS2496M(SOIC) pinout is identical to ICS2496N(DIP).
Pin Configuration
Features
Specified for dual voltage operation (V DD = 3.3V or 5V)
but operates continuously from 3.0V to 5.25V
Power-down input for extended battery life in portable
applications
Guaranteed performance up to 110 MHz (at 3.3V)
or 135 MHz (at 5V)
Advanced PLL for low phase-jitter
Low power CMOS device technology
Excellent power supply rejection
Integral Loop Filter components
Mask-programmable frequencies
Small footprint - 16-pin DIP or SOIC
Generates 16 video clock frequencies derived from a
14.318 MHz system clock reference frequency
Provision for external frequency input
Video clock is selectable among the 16 internally gener-
ated clocks, one external clock, or the buffered crystal
oscillator
Internal clock remains locked when the external frequency
input is selected
On-chip generation of four memory clock frequencies
Patented technique eliminates cross-interference between
video and memory clocks
Fast acquisition of selected frequencies, strobed or non-
strobed
XTAL2
1
16
XTAL1
EXTFREQ
2
15
VCLK
FS0
3
14
XTALOUT
FS1
4
13
VSS
STROBE
5
12
VDD
FS2
6
11
PWRDN
FS3
7
10
MCLK
MS0
8
9
MS1
16-Pin DIP or SOIC
ICS2496RevA100594
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