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参数资料
| 型号： | ICS300MT-XX |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 160 MHz, OTHER CLOCK GENERATOR, PDSO8 |
| 封装： | SOIC-8 |
| 文件页数： | 2/4页 |
| 文件大小： | 64K |
| 代理商： | ICS300MT-XX |
REF
Comments
Reference
Buffered oscillator output
Reference/2
Oscillator frequency divided by two
CLK/2
CLK frequency divided by two
Off
Output stopped low. Lowest jitter
MDS 300QT E
2
Revision 111000
Integrated Circuit Systems, Inc. 525 Race Street San Jose CA95126(408) 295-9800tel www.icst.com
ICS300/ICS301/ICS302
QTClock Quick Turn Clock Synthesizer
Pin Assignments
1
8
2
3
4
7
6
5
X1/ICLK
VDD
GND
REF
X2
PDTS
DC
CLK
Number Number
Name
Type Description
300/1
302
1
8
X1/ICLK
I
Crystal connection or clock input. Clock only on ICS302.
2
VDD
P
Connect to +3.3V or +5V.
3
1, 3
GND
P
Connect to ground.
4
REF
O
Buffered crystal oscillator output clock, or variation per REF clock options table above.
5
CLK
O
Clock output. Fixed frequency between 6 and 200 MHz programmed at factory.
6
DC
-
Don't Connect anything to this pin.
7
PDTS
I
Powers down PLL, and puts both outputs into high impedance state, when low.
8
-
X2
O
Crystal connection. Leave unconnected for clock input.
Pin Descriptions
Key: I = Input, O = output, P = power supply connection
REF Clock Options
External Components / Crystal Selection
The ICS300/301/302 requires a 0.01F decoupling capacitor to be connected between VDD and GND.
It must be connected close to the ICS300/301/302 to minimize lead inductance. No external power
supply filtering is required for this device. A 33
terminating resistor can be used next to the CLK and
REF pins. The total on-chip capacitance is approximately 16 pF, so a parallel resonant, fundamental mode
crystal should be used. For crystals with a specified load capacitance greater than 16 pF, crystal capacitors
can be connected from each of the pins X1 and X2 to Ground. The value (in pF) of these crystal caps
should be = (CL-16)*2, where CL is the crystal load capacitance in pF. These external capacitors are only
required for applications where the exact frequency is critical. For a clock input, connect to X1/ICLK and
leave X2 unconnected (no capacitors on either).
Device Configuration
The specification is complete when the ICS300/301/302 QTClock Order Form accompanies this data
sheet. The order form lists the input, REF, and CLK actual frequencies, as well as any other available
options. This unique configuration is given a two character alphanumeric programming code, which must
be specified when referring to samples.
ICS300
ICS301
1
8
2
3
4
7
6
5
ICLK
VDD
GND
REF
PDTS
DC
CLK
GND
ICS302
相关PDF资料 |
PDF描述 |
|---|---|
| ICS307M-01I | 200 MHz, OTHER CLOCK GENERATOR, PDSO16 |
| ICS307M-01T | 200 MHz, OTHER CLOCK GENERATOR, PDSO16 |
| ICS307M-01LFT | 200 MHz, OTHER CLOCK GENERATOR, PDSO16 |
| ICS307M-02 | 200 MHz, OTHER CLOCK GENERATOR, PDSO16 |
| ICS308RI | 200 MHz, OTHER CLOCK GENERATOR, PDSO20 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS301M | 制造商:ICS 制造商全称:ICS 功能描述:QTClock⑩ Quick Turn Clock Synthesizer |
| ICS301MT | 制造商:ICS 制造商全称:ICS 功能描述:QTClock⑩ Quick Turn Clock Synthesizer |
| ICS302M | 制造商:ICS 制造商全称:ICS 功能描述:QTClock⑩ Quick Turn Clock Synthesizer |
| ICS302MT | 制造商:ICS 制造商全称:ICS 功能描述:QTClock⑩ Quick Turn Clock Synthesizer |
| ICS-306-AGG | 制造商:Samtec Inc 功能描述:CONN DIP SCKT SKT 6 POS 2.54MM SLDR ST TH - Bulk |
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