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参数资料
| 型号： | ICS300MT-XX |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 160 MHz, OTHER CLOCK GENERATOR, PDSO8 |
| 封装： | SOIC-8 |
| 文件页数： | 3/4页 |
| 文件大小： | 64K |
| 代理商： | ICS300MT-XX |
MDS 300QT E
3
Revision 111000
Integrated Circuit Systems, Inc. 525 Race Street San Jose CA95126(408) 295-9800tel www.icst.com
ICS300/ICS301/ICS302
QTClock Quick Turn Clock Synthesizer
Parameter
Conditions
Minimum
Typical
Maximum
Units
ABSOLUTE MAXIMUM RATINGS (stresses beyond these can permanently damage the device)
Supply Voltage, VDD
Referenced to GND
7
V
Inputs
Referenced to GND
-0.5
VDD+0.5
V
Clock Output
Referenced to GND
-0.5
VDD+0.5
V
Ambient Operating Temperature
0
70
°C
Soldering Temperature
Max of 10 seconds
260
°C
Storage temperature
-65
150
°C
DC CHARACTERISTICS (VDD = 5.0V unless otherwise noted)
Operating Voltage, VDD
3
5.5
V
Input High Voltage, VIH, ICLK only
ICLK (Pin 1)
(VDD/2)+1
VDD/2
V
Input Low Voltage, VIL, ICLK only
ICLK (Pin 1)
VDD/2
(VDD/2)-1
V
Input High Voltage, VIH
PDTS
2
V
Input Low Voltage, VIL
PDTS
0.4
V
Output High Voltage, VOH
IOH=-4mA
VDD-0.4
V
Output High Voltage, VOH
IOH=-25mA
2.4
V
Output Low Voltage, VOL
IOL=25mA
0.4
V
IDD Operating Supply Current, 20 MHz crystal No Load, 100MHz
20
mA
Short Circuit Current
CLK output
±70
mA
On-Chip Pull-up Resistor, PDTS
Pin 7
270
k
Input Capacitance, PDTS
Pin 7
4
pF
AC CHARACTERISTICS (VDD = 5.0V unless otherwise noted)
Input Frequency, crystal input, ICS300 and 301
5
27
MHz
Input Frequency, clock input, ICS300 and 301
2
50
MHz
Input Frequency, clock input, ICS302
50
125
MHz
Output Frequency, ICS300
VDD = 4.5 to 5.5V
6
160
MHz
Output Frequency, ICS300
VDD = 3.0 to 3.6V
6
100
MHz
Output Frequency, ICS301 and ICS302
VDD = 4.5 to 5.5V
6
200
MHz
Output Frequency, ICS301 and ICS302
VDD = 3.0 to 3.6V
6
200
MHz
Output Clock Rise Time
0.8 to 2.0V
1
ns
Output Clock Fall Time
2.0 to 0.8V
1
ns
Output Clock Duty Cycle (Note 1)
at programmed level
45
49 to 51
55
%
Absolute Clock Period Jitter
Deviation from mean
±120
ps
One Sigma Clock Period Jitter
50
ps
Power-up time, PDTS goes high until Refer. out
Reference on REF clk
3
10
ms
Power-up time, PDTS goes high until CLK out
8
20
ms
Electrical Specifications
Note 1: These are typical values. The actual minimum and maximum duty cycle limits are shown on the
ICS300/301/302 QTClock Order Form for each programmed version.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS301M | 制造商:ICS 制造商全称:ICS 功能描述:QTClock⑩ Quick Turn Clock Synthesizer |
| ICS301MT | 制造商:ICS 制造商全称:ICS 功能描述:QTClock⑩ Quick Turn Clock Synthesizer |
| ICS302M | 制造商:ICS 制造商全称:ICS 功能描述:QTClock⑩ Quick Turn Clock Synthesizer |
| ICS302MT | 制造商:ICS 制造商全称:ICS 功能描述:QTClock⑩ Quick Turn Clock Synthesizer |
| ICS-306-AGG | 制造商:Samtec Inc 功能描述:CONN DIP SCKT SKT 6 POS 2.54MM SLDR ST TH - Bulk |
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