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参数资料
| 型号： | ICS504MT |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 66.7 MHz, VIDEO CLOCK GENERATOR, PDSO8 |
| 封装： | SOIC-8 |
| 文件页数： | 4/4页 |
| 文件大小： | 53K |
| 代理商： | ICS504MT |
ICS504
Intel i740 Graphics Clock Source
MDS504A
4
Revision 6018
Printed 6/1/98
MicroClock Division of ICS1271 Parkmoor Ave.San JoseCA95126(408)295-9800tel(408)295-9818fax
PRELIMINARY
PRELIMINARY INFORMATION
INFORMATION
ICRO
CLOCK
While the information presented herein has been checked for both accuracy and reliability, ICS/MicroClock assumes no responsibility for either its use or for the infringement of
any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal
commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not
recommended without additional processing by ICS/MicroClock. ICS/MicroClock reserves the right to change any circuitry or specifications without notice. ICS/MicroClock
does not authorize or warrant any ICS/MicroClock product for use in life support devices or critical medical instruments.
Package Outline and Package Dimensions
Inches
Millimeters
Symbol
Min
Max
Min
Max
A
0.055
0.068
1.397
1.7272
b
0.013
0.019
0.330
0.483
D
0.185
0.200
4.699
5.080
E
0.150
0.160
3.810
4.064
H
0.225
0.245
5.715
6.223
e
.050 BSC
1.27 BSC
h
0.015
0.381
Q
0.004
0.01
0.102
0.254
8 pin SOIC
Ordering Information
Part/Order Number
Marking
Package
Temperature
ICS504M
8 pin SOIC
0-70°C
ICS504MT
ICS504M
8 pin SOIC on tape and reel
0-70°C
External Components / Crystal Selection
The ICS504 requires a 0.01F decoupling capacitor to be connected between VDD and GND. It must be
connected close to the ICS504 to minimize lead inductance. No external power supply filtering is required
for this device. A 33
terminating resistor can be used next to the CLK pin. The total on-chip crystal
capacitance is approximately 13 pF, and a parallel resonant, fundamental mode crystal should be used. For
crystals with a specified load capacitance greater than 13 pF, crystal capacitors should be connected from
each of the pins X1 and X2 to Ground as shown in the Block Diagram on page 1. The value (in pF) of
these crystal caps should be = (CL-13)*2, where CL is the crystal load capacitance in pF. These external
capacitors are only required for applications where the exact frequency is critical. For a clock input,
connect to X1 and leave X2 unconnected (no capacitors on either).
c
A
b
D
E
H
e
h x 45°
Q
Pin 1
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| ICS514M | 140 MHz, OTHER CLOCK GENERATOR, PDSO8 |
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相关代理商/技术参数 |
参数描述 |
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| ICS507-01 | 制造商:ICS 制造商全称:ICS 功能描述:PECL Clock Synthesizer |
| ICS507-01-DPK | 制造商:ICS 制造商全称:ICS 功能描述:PECL Clock Synthesizer |
| ICS507-01-DSW | 制造商:ICS 制造商全称:ICS 功能描述:PECL Clock Synthesizer |
| ICS507-01-DWF | 制造商:ICS 制造商全称:ICS 功能描述:PECL Clock Synthesizer |
| ICS507M-01 | 功能描述:IC CLOCK SYNTHESIZER PECL 16SOIC RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 产品变化通告:Product Discontinuation 04/May/2011 标准包装:96 系列:- 类型:时钟倍频器，零延迟缓冲器 PLL:带旁路 输入:LVTTL 输出:LVTTL 电路数:1 比率 - 输入:输出:1:8 差分 - 输入:输出:无/无 频率 - 最大:133.3MHz 除法器/乘法器:是/无 电源电压:3 V ~ 3.6 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:管件 其它名称:23S08-5HPGG |
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