参数资料
型号: ICS552R-01IT
元件分类: 时钟及定时
英文描述: LOW SKEW CLOCK DRIVER, PDSO20
封装: 0.150 INCH, SSOP-20
文件页数: 1/10页
文件大小: 184K
代理商: ICS552R-01IT
ICS552-01
MDS 552-01 E
1
Revision 111705
Integrated Circuit Systems, Inc.
525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
Oscillator, Multiplier, and Buffer with 8 Outputs
Description
The ICS552-01 produces 8 low-skew copies of the
multiple input clock or fundamental, parallel-mode
crystal. Unlike other clock drivers, these parts do not
require a separate oscillator for the input. Using ICS’
patented Phase-Locked Loop (PLL) to multiply the
input frequency, it is ideal for generating and
distributing multiple high-frequency clocks. This is a
single chip used for 3 different applications:
1) ICS552-01 (A mode) — an Oscillator mutiplier
2) ICS552-01 (B mode) — a Dual 1:4 buffer
3) ICS552-01 (C mode) — a 1:8 Oscillator buffer
Features (all)
Packaged as 20-pin SSOP (QSOP)
Pb-free packaging available
Operating voltages of 3.0 V to 5.5 V
Industrial temperature available
Features (specific)
ICS552-01 (for A mode)
Contains on-chip multiplier with selections of x1,
x1.33, x2, x2.66, x3, x3.33, x4, x4.66, x5, and x6
Power-down and Tri-state modes
ICS552-01 (for B mode)
Up to 200 MHz clock input/output at 3.3 V
Low skew of 250 ps maximum for any bank of four
Inputs can be connected together for a 1 to 8 buffer
with 250 ps skew between any outputs
Non-inverting buffer mode
Ideal for clock networks
Output Enable mode tri-states outputs
Full CMOS output swing with 25 mA output drive
capability at TTL levels
Advanced, low power, sub-micron CMOS process
ICS552-01 (for C mode)
Use with 25 MHz crystal for networking
Use with 27 MHz crystal for MPEG
ICS552-01 (for A and C modes)
Input frequency of 10.0 to 27.0 MHz
Provides 8 low-skew outputs (<250 ps)
Output clock duty cycle of 40/60 at 3.3 V
NOTE: The ICS552A-01 is recommended
for new designs
Block Diagram (ICS552-01—A mode)
Crystal
Buffer/
Crystal
Oscillator
GND
VDD
PLL
Multiplier
S3:S0
CLK1
CLK8
CLK7
CLK6
CLK5
CLK4
CLK3
CLK2
4
X2
10.0 to 27.0 MHz
crystal or clock input
External capacitors are
required with a crystal input.
X1
相关PDF资料
PDF描述
ICS554G-01AI 554 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
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