参数资料
型号: ICS650R-14T
元件分类: XO, clock
英文描述: 133.33 MHz, OTHER CLOCK GENERATOR, PDSO20
封装: 0.150 INCH, SSOP-20
文件页数: 3/6页
文件大小: 139K
代理商: ICS650R-14T
Networking System Clock
MDS 650-14 E
3
Revision 092104
Integrated Circuit Systems, Inc.
525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
ICS650-14
Key: XI, XO = crystal connections; I = input; I(Pu) = input with pull-up; O = output; P = power supply
connection; TI = tri-level input
External Components
The ICS650-14 requires a minimum number of external
components for proper operation.
Decoupling Capacitor
Decoupling capacitors of 0.01F must be connected
between each VDD and GND (pins 4 and 6, pins 16
and 14), as close to the device as possible. For
optimum device performance, the decoupling capacitor
should be mounted on the component side of the PCB.
Avoid the use of vias in the decoupling circuit.
Series Termination Resistor
When the PCB trace between the clock outputs and the
loads are over 1 inch, series termination should be
used. To series terminate a 50
trace (a commonly
used trace impedance) place a 33
resistor in series
with the clock line, as close to the clock output pin as
possible. The nominal impedance of the clock output is
20
.
Crystal Information
The crystal used should be a fundamental mode (do
not use third overtone), parallel resonant. Crystal
capacitors should be connected from pins X1 to ground
and X2 to ground to optimize the initial accuracy. The
value of these capacitors is given by the following
equation:
Crystal caps (pF) = (CL - 6) x 2
In the equation, CL is the crystal load capacitance. For
a crystal with a 16 pF load capacitance, two 20 pF
[(16-6) x 2] capacitors should be used.
13
CLKA4
O
Selectable clock output. See table 1.
14
GND
P
Connect to ground.
15
SELA1
TI
Select pin for CLKA1:4 and CLKA5 outputs. See table 1.
16
VDD
P
Connect to 3.3 Vor 5 V. Must be same as other VDDs.
17
CLKA3
O
Selectable clock output. See table 1.
18
CLKA2
O
Selectable clock output. See table 1.
19
SELA0
TI
Select pin for CLKA1:4 and CLKA5 outputs. See table 1.
20
SELC
TI
Select pin for CLKC output. See table 3.
Pin
Number
Pin
Name
Pin
Type
Pin Description
相关PDF资料
PDF描述
ICS840001AKI-34LF 213.33 MHz, OTHER CLOCK GENERATOR, QCC16
I2041AG-8TR 40.4 MHz, OTHER CLOCK GENERATOR, PDSO8
I2779A-08TT 38 MHz, VIDEO CLOCK GENERATOR, PDSO8
I2781A-08ST 78 MHz, OTHER CLOCK GENERATOR, PDSO8
I2782AG-08TT 156 MHz, OTHER CLOCK GENERATOR, PDSO8
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