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参数资料
| 型号： | ICS650R-27IT |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 133.3333 MHz, OTHER CLOCK GENERATOR, PDSO20 |
| 封装： | 0.150 INCH, SSOP-20 |
| 文件页数： | 3/7页 |
| 文件大小： | 230K |
| 代理商： | ICS650R-27IT |
Networking Clock Source
MDS 650-27 D
3
Revision 070505
Integrated Circuit Systems, Inc.
● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
ICS650-27
For a 25 MHz fundamental crystal or clock input, the following four tables apply:
A Clocks Select Table (outputs in MHz)
C Clocks Select Table (outputs in MHz)
B Clocks Select Table (outputs in MHz)
Reference Output Clock Frequency (in MHz)
For a 12.5 MHz fundamental crystal or clock input, the following four tables apply:
A Clocks Select Table (outputs in MHz)
C Clocks Select Table (outputs in MHz)
B Clocks Select Table (outputs in MHz)
Reference Output Clock Frequency (in MHz)
0 = connect directly to GND
M = leave unconnected (automatically self biases to VDD/2)
1 = connect directly to VDD
ASC1
ASC0
CLKA1
CLKA2
00
100
off (low)
0
M
Test
01
75
off (low)
1
0
33.3333
16.6667
1
M
Test
1
66.6667
33.3333
CCS
CLKC1
CLKC2
0
125
M
Test
175
75
BSC1
BSC0
CLKB1
CLKB2
0
Test
0
M
66.6667
33.3333
01
100
50
1
0
83.3333
41.6667
1
M
Test
1
133.3333
66.6667
REFOUT
25
ASC1
ASC0
CLKA1
CLKA2
00
50
off (low)
0
M
Test
0
1
37.5
off (low)
1
0
16.6667
8.3333
1
M
Test
1
33.3333
16.6667
CCS
CLKC1
CLKC2
062.5
62.5
M
Test
137.5
37.5
BSC1
BSC0
CLKB1
CLKB2
0
Test
0
M
33.3333
16.6667
0
1
50
25
1
0
41.6667
20.8333
1
M
Test
1
66.6667
33.3333
REFOUT
12.5
ICS650-27
Networking Clock Source
TSD
IDT / ICS Networking Clock Source
ICS650-27
3
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