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参数资料
| 型号： | ICS671M-03IT |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 671 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| 封装： | 0.150 INCH, SOIC-16 |
| 文件页数： | 2/9页 |
| 文件大小： | 196K |
| 代理商： | ICS671M-03IT |
ICS671-03
3.3 VOLT ZERO DELAY, LOW SKEW BUFFER
ZDB AND MULTIPLIER
IDT 3.3 VOLT ZERO DELAY, LOW SKEW BUFFER
2
ICS671-03
REV B 112706
Pin Assignment
Output Clock Mode Select Table
Note 1: Outputs are in high impedance state with weak pulldowns.
Note 2: Buffer mode only; not zero delay between input and output.
Pin Descriptions
Note: Outputs have a weak internal pull-down when in tri-state mode.
S2
S1
CLKA1:A4
CLKB1:B4
A & B Source
PLL Status
0
Tri-state (note 1)
PLL
ON
0
1
Stopped Low
None
OFF
1
0
Running
CLKIN (note 2)
OFF
1
Running
PLL
ON
Pin
Number
Pin
Name
Pin
Type
Pin Description
1
CLKIN
Input
Clock Input (5 V tolerant).
2, 3, 14, 15
CLKA1:A4
Output
Clock Outputs A1:A4. See above table. Outputs have weak pulldown resistors.
4, 13
VDD
Power
Power supply. Connect both pins to 3.3 V.
5, 12
GND
Power
Connect to ground.
6, 7, 10, 11
CLKB1:B4
Output
Clock Outputs B1:B4. See above table. Outputs have weak pulldown resistors.
8
S2
Input
Select input 2. See table above. Internal pull-up.
9
S1
Input
Select input 1. See table above. Internal pull-up.
16
FBIN
Input
Feedback Input. Connect to any output under normal operation (5 V tolerant).
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS671M-06I | 制造商:ICS 制造商全称:ICS 功能描述:3.3 VOLT ZERO DELAY, LOW SKEW BUFFER |
| ICS671M-06ILF | 制造商:ICS 制造商全称:ICS 功能描述:3.3 VOLT ZERO DELAY, LOW SKEW BUFFER |
| ICS671M-06ILFT | 制造商:ICS 制造商全称:ICS 功能描述:3.3 VOLT ZERO DELAY, LOW SKEW BUFFER |
| ICS671M-06IT | 制造商:ICS 制造商全称:ICS 功能描述:3.3 VOLT ZERO DELAY, LOW SKEW BUFFER |
| ICS672-01 | 制造商:ICS 制造商全称:ICS 功能描述:QuadraClock⑩ Quadrature Delay Buffer |
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