参数资料
型号: ICS680G-01T
元件分类: 时钟产生/分配
英文描述: 66.6666 MHz, OTHER CLOCK GENERATOR, PDSO24
封装: 0.173 INCH, TSSOP-24
文件页数: 7/8页
文件大小: 149K
代理商: ICS680G-01T
Networking Clock Synthesizer and Zero Delay Buffer
MDS 680-01 F
7
Revision 020305
Integrated Circuit Systems, Inc.
525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
ICS680-01
Package Outline and Package Dimensions (24-pin TSSOP, 173 Mil. Body)
Package dimensions are kept current with JEDEC Publication No. 95
Ordering Information
“LF” denotes Pb (lead) free package.
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS)
assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would
result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial
applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary
environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any
circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or
critical medical instruments.
Part / Order Number
Marking
Shipping Packaging
Package
Temperature
ICS680G-01
680G-01
Tubes
24-pin TSSOP
0 to +70
° C
ICS680G-01T
680G-01
Tape and Reel
24-pin TSSOP
0 to +70
° C
ICS680G-01LF
680G-01LF
Tubes
24-pin TSSOP
0 to +70
° C
ICS680G-01LFT
680G-01LF
Tape and Reel
24-pin TSSOP
0 to +70
° C
INDEX
AREA
1 2
24
D
E1
E
SEATING
PLANE
A1
A
A2
e
- C -
b
.10 (.004)
C
c
L
Millimeters
Inches
Symbol
Min
Max
Min
Max
A
1.20
.047
A1
0.05
0.15
0.002
0.006
A2
0.80
1.05
0.032
0.041
b
0.19
0.30
0.007
0.012
C
0.09
0.20
0.0035
0.008
D
7.70
7.90
0.303
0.311
E
6.40 BASIC
0.252 BASIC
E1
4.30
4.50
0.169
0.177
e
0.65 Basic
0.0256 Basic
L
0.450.75.018
.030
α
0
°
8
°
0
°
8
°
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