参数资料
型号: ICS722MT
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 时钟产生/分配
英文描述: 28 MHz, OTHER CLOCK GENERATOR, PDSO8
封装: 0.150 INCH, SOIC-8
文件页数: 3/7页
文件大小: 241K
代理商: ICS722MT
LOW COST 27 MHZ 3.3 VOLT VCXO
MDS 722 A
3
Revision 121404
In te gr ated Circuit Systems 525 Ra ce Street, San Jose, CA 9512 6 tel (4 08) 297-1 201 www.icst.com
ICS722
External Component Selection
The ICS722 requires a minimum number of external
components for proper operation.
Decoupling Capacitors
A decoupling capacitor of 0.01
F should be connected
between VDD and GND on pins 2 and 4 as close to the
ICS722 as possible. For optimum device performance,
the decoupling capacitor should be mounted on the
component side of the PCB. Avoid the use of vias in the
decoupling circuit.
Series Termination Resistor
When the PCB trace between the clock output and the
load is over 1 inch, series termination should be used.
To series terminate a 50
trace (a commonly used
trace impedance), place a 33
resistor in series with
the clock line, as close to the clock output pin as
possible. The nominal impedance of the clock output is
20
.
Quartz Crystal
The ICS722 VCXO function consists of the external
crystal and the integrated VCXO oscillator circuit. To
assure the best system performance (frequency pull
range) and reliability, a crystal device with the
recommended parameters (shown below) must be
used, and the layout guidelines discussed in the
following section shown must be followed.
The oscillation frequency of a quartz crystal is
determined by its “cut” and by the load capacitors
connected to it. The ICS722 incorporates on-chip
variable load capacitors that “pull” (change) the
frequency of the crystal. The crystal specified for use
with the ICS722 is designed to have zero frequency
error when the total of on-chip + stray capacitance is
14 pF.
Recommended Crystal Parameters:
Initial Accuracy at 25°C±20 ppm
Temperature Stability
±30 ppm
Aging
±20 ppm
Load Capacitance
14 pf
Shunt Capacitance, C0
7 pF Max
C0/C1 Ratio
250 Max
Equivalent Series Resistance
35
Max
The external crystal must be connected as close to the
chip as possible and should be on the same side of the
PCB as the ICS722. There should be no via’s between
the crystal pins and the X1 and X2 device pins. There
should be no signal traces underneath or close to the
crystal. See application note MAN05.
Crystal Tuning Load Capacitors
The crystal traces should include pads for small fixed
capacitors, one between X1 and ground, and another
between X2 and ground. Stuffing of these capacitors
on the PCB is optional. The need for these capacitors is
determined at system prototype evaluation, and is
influenced by the particular crystal used (manufacture
and frequency) and by PCB layout. The typical required
capacitor value is 1 to 4 pF.
The procedure for determining the value of these
capacitors can be found in application note MAN05.
ICS722
LOW COST 27 MHZ 3.3 VOLT VCXO
TSD
IDT / ICS LOW COST 27 MHZ 3.3 VOLT VCXO
ICS722
3
相关PDF资料
PDF描述
ICS726TT 36 MHz, OTHER CLOCK GENERATOR, PDSO6
ICS726TT 36 MHz, OTHER CLOCK GENERATOR, PDSO6
ICS729TLFT 36 MHz, OTHER CLOCK GENERATOR, PDSO6
ICS8302AMILFT 8302 SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
ICS8302AMIT 8302 SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
相关代理商/技术参数
参数描述
ICS726 制造商:ICS 制造商全称:ICS 功能描述:12 TO 36 MHZ SOT-23 VCXO
ICS726A 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:12 TO 36 MHZ 6TSOT VCXO
ICS726A_10 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:12 TO 36 MHZ 6TSOT VCXO
ICS726ATLFT 功能描述:IC VCXO 3.3V 12-36MHZ 6-TSOT RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器,PLL,频率合成器 系列:- 标准包装:2,000 系列:- 类型:PLL 时钟发生器 PLL:带旁路 输入:LVCMOS,LVPECL 输出:LVCMOS 电路数:1 比率 - 输入:输出:2:11 差分 - 输入:输出:是/无 频率 - 最大:240MHz 除法器/乘法器:是/无 电源电压:3.135 V ~ 3.465 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:32-LQFP 供应商设备封装:32-TQFP(7x7) 包装:带卷 (TR)
ICS726T 制造商:ICS 制造商全称:ICS 功能描述:12 TO 36 MHZ SOT-23 VCXO