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| 型号： | ICS8402AKIT |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 12/19页 |
| 文件大小： | 0K |
| 描述： | IC FREQ SYNTHESIZER 32VFQFPN |
| 标准包装： | 2,500 |
| 系列： | HiPerClockS™ |
| 类型： | 频率合成器 |
| PLL： | 带旁路 |
| 输入： | 晶体 |
| 输出： | LVCMOS，LVTTL |
| 电路数： | 1 |
| 比率 - 输入:输出： | 1:2 |
| 差分 - 输入:输出： | 无/无 |
| 频率 - 最大： | 350MHz |
| 除法器/乘法器： | 是/无 |
| 电源电压： | 3.135 V ~ 3.465 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-VFQFN 裸露焊盘 |
| 供应商设备封装： | 32-VFQFPN（5x5） |
| 包装： | 带卷 (TR) |
| 其它名称： | 8402AKIT |
ICS8402I
350MHZ, CRYSTAL-TO-LVCMOS/LVTTL FREQUENCY SYNTHESIZER
IDT / ICS LVCMOS/LVTTL FREQUENCY SYNTHESIZER
2
ICS8402AYI REV. A OCTOBER 16, 2007
Functional Description
NOTE: The functional description that follows describes operation
using a 25MHz crystal. Valid PLL loop divider values for different
crystal or input frequencies are defined in the Input Frequency
Characteristics, Table 5, NOTE 1.
The ICS8402I features a fully integrated PLL and therefore
requires no external components for setting the loop bandwidth. A
fundamental crystal is used as the input to the on-chip oscillator.
The output of the oscillator is fed into the phase detector. A 25MHz
crystal provides a 25MHz phase detector reference frequency. The
VCO of the PLL operates over a range of 250MHz to 700MHz. The
output of the M divider is also applied to the phase detector.
The phase detector and the M divider force the VCO output
frequency to be M times the reference frequency by adjusting the
VCO control voltage. Note that for some values of M (either too
high or too low), the PLL will not achieve lock. The output of the
VCO is scaled by a divider prior to being sent to each of the
LVCMOS output buffers. The divider provides a 50% output duty
cycle.
The programmable features of the ICS8402I support two input
modes to program the M divider and N output divider. The two input
operational modes are parallel and serial. Figure 1 shows the
timing diagram for each mode. In parallel mode, the nP_LOAD
input is initially LOW. The data on inputs M0 through M8 and N0
and N1 is passed directly to the M divider and N output divider. On
the LOW-to-HIGH transition of the nP_LOAD input, the data is
latched and the M divider remains loaded until the next LOW
transition on nP_LOAD or until a serial event occurs. As a result,
the M and N bits can be hardwired to set the M divider and N output
divider to a specific default state that will automatically occur
during power-up. The TEST output is LOW when operating in the
parallel input mode. The relationship between the VCO frequency,
the crystal frequency and the M divider is defined as follows:
fVCO = fXTAL x M
The M value and the required values of M0 through M8 are shown
in Table 3B, Programmable VCO Frequency Function Table. Valid
M values for which the PLL will achieve lock for a 25MHz reference
are defined as 10
≤ M ≤ 28. The frequency out is defined as follows:
fout = fVCO = fXTAL x M
NN
Serial operation occurs when nP_LOAD is HIGH and S_LOAD is
LOW. The shift register is loaded by sampling the S_DATA bits with
the rising edge of S_CLOCK. The contents of the shift register are
loaded into the M divider and N output divider when S_LOAD
transitions from LOW-to-HIGH. The M divide and N output divide
values are latched on the HIGH-to-LOW transition of S_LOAD. If
S_LOAD is held HIGH, data at the S_DATA input is passed directly
to the M divider and N output divider on each rising edge of
S_CLOCK. The serial mode can be used to program the M and N
bits and test bits T1 and T0. The internal registers T0 and T1
determine the state of the TEST output as follows:
T1
T0
TEST Output
00
LOW
0
1
Shift Register Output
1
0
Output of M Divider
1
CMOS fOUT
Time
SERIAL LOADING
PARALLEL LOADING
t
S
t
H
t
S
t
H
t
S
M, N
S_CLOCK
S_DATA
S_LOAD
nP_LOAD
M0:M8, N0:N1
T1
T0
N1
N0
M0
M1
M2
M3
M4
M5
*Null
M6
M7
M8
*NOTE: The NULL timing slot must be observed.
Figure 1. Parallel & Serial Load Operations
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS8402AKLF | 功能描述:IC FREQ SYNTHESIZER 32VFQFPN RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™ 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
| ICS8402AKLFT | 功能描述:IC FREQ SYNTHESIZER 32VFQFPN RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™ 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
| ICS8402AKT | 制造商:ICS 制造商全称:ICS 功能描述:350MHZ, CRYSTAL-TO-LVCMOS / LVTTL FREQUENCY SYNTHESIZER |
| ICS8402AY | 制造商:ICS 制造商全称:ICS 功能描述:350MHZ, CRYSTAL-TO-LVCMOS / LVTTL FREQUENCY SYNTHESIZER |
| ICS8402AYI | 制造商:ICS 制造商全称:ICS 功能描述:350MHZ, CRYSTAL-TO-LVCMOS / LVTTL FREQUENCY SYNTHESIZER |
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