- 您现在的位置：买卖IC网 > PDF目录67688 > ICS840S07BYILFT (INTEGRATED DEVICE TECHNOLOGY INC) 167.67 MHz, OTHER CLOCK GENERATOR, PQFP32 PDF资料下载
参数资料
| 型号： | ICS840S07BYILFT |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 167.67 MHz, OTHER CLOCK GENERATOR, PQFP32 |
| 封装： | 7 X 7 MM, 1 MM HEIGHT, ROHS COMPLIANT, MS-026ABA, TQFP-32 |
| 文件页数： | 15/15页 |
| 文件大小： | 244K |
| 代理商： | ICS840S07BYILFT |
IDT / ICS LVCMOS FREQUENCY SYNTHESIZER
9
ICS840S07BYI REV. A NOVEMBER 7, 2007
ICS840S07I
CRYSTAL-TO-LVCMOS/LVTTL FREQUENCY SYNTHESIZER
PRELIMINARY
APPLICATION INFORMATION
FIGURE 1. POWER SUPPLY FILTERING
10
Ω
V
DDA
10
μF
.01
μF
3.3V
.01
μF
V
DD
INPUTS:
LVCMOS CONTROL PINS
All control pins have internal pull-downs; additional resistance is
not required but can be added for additional protection. A 1k
Ω
resistor can be used.
CRYSTAL INPUTS
For applications not requiring the use of the crystal oscillator input,
both XTAL_IN and XTAL_OUT can be left floating. Though not
required, but for additional protection, a 1k
Ω resistor can be tied
from XTAL_IN to ground.
REF_IN INPUT
For applications not requiring the use of the reference clock, it
can be left floating. Though not required, but for additional
protection, a 1k
Ω resistor can be tied from the REF_IN to ground.
RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS
OUTPUTS:
LVCMOS OUTPUTS
All unused LVCMOS output can be left floating. There should be
no trace attached.
POWER SUPPLY FILTERING TECHNIQUES
As in any high speed analog circuitry, the power supply pins are
vulnerable to random noise. To achieve optimum jitter perfor-
mance, power supply isolation is required. The ICS840S07I pro-
vides separate power supplies to isolate any high switching noise
from the outputs to the internal PLL. V
DD, VDDA, and VDDO_X should
be
individually
connected
to
the
power
supply
plane through vias, and 0.01F bypass capacitors should be used
for each pin. Figure 1 illustrates this for a generic V
DD pin and
also shows that V
DDA requires that an additional10Ω resistor
along with a 10F bypass capacitor be connected to the V
DDA pin.
The 10
Ω resistor can also be replaced by a ferrite bead.
相关PDF资料 |
PDF描述 |
|---|---|
| ICS841003AKI-02T | 625 MHz, PROC SPECIFIC CLOCK GENERATOR, QCC32 |
| ICS841003AKI-04LF | 680 MHz, OTHER CLOCK GENERATOR, QCC32 |
| ICS841604AGILFT | 125 MHz, OTHER CLOCK GENERATOR, PDSO28 |
| ICS841S01BGI | 100 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO16 |
| ICS841S01BGT | 100 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO16 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS841003AKI-02LF | 制造商:Integrated Device Technology Inc 功能描述: |
| ICS841202AK-245LF | 功能描述:IC CLOCK SYNTHESIZER 32-VFQFPN RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
| ICS841202AK-245LFT | 功能描述:IC CLOCK SYNTHESIZER 32-VFQFPN RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
| ICS841202AKI-245LF | 功能描述:IC CLOCK SYNTHESIZER 32-VFQFPN RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
| ICS841202AKI-245LFT | 功能描述:IC CLOCK SYNTHESIZER 32-VFQFPN RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
发布紧急采购，3分钟左右您将得到回复。